參數(shù)資料
型號： PSD913F2
英文描述： 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads
中文描述： 可配置的存儲系統(tǒng)級芯片的8位微控制器
文件頁數(shù)： 80/94頁
文件大?。?/td> 463K
代理商： PSD913F2
Preliminary
PSD913F1
79
Microcontroller Interface – PSD913F1V AC/DC Parameters
(3.0 V to 3.6 V Versions)
Symbol
Parameter
Min
Typ
Max
Unit
Flash Bulk Erase (Preprogrammed) (Note 1)
3
30
sec
Flash Bulk Erase (Not Preprogrammed)
5
sec
t
WHQV3
t
WHQV2
t
WHQV1
Sector Erase (Preprogrammed)
1
30
sec
Sector Erase (Not Preprogrammed)
2.2
sec
Byte Program
14
1200
μs
Program/Erase Cycles (Per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-0) Valid
(Data Polling) (Note 2)
30
ns
Flash Program, Write and Erase Times
(3.0 V to 3.6 V Versions)
-15
-20
Symbol
Parameter
Conditions
Min
Max
Min
Max
Unit
t
ISCCF
t
ISCCH
t
ISCCL
t
ISCCF-P
t
ISCCH-P
t
ISCCL-P
t
ISCPSU
t
ISCPH
t
ISCPCO
t
ISCPZV
t
ISCPVZ
TCK Clock Frequency (except for PLD)
TCK Clock High Time
TCK Clock Low Time
TCK Clock Frequency (for PLD only)
TCK Clock High Time (for PLD only)
TCK Clock Low Time (for PLD only)
ISC Port Set Up Time
ISC Port Hold Up Time
ISC Port Clock to Output
ISC Port High-Impedance to Valid Output
ISC Port Valid Output to High-Impedance
(Note 1)
(Note 1)
(Note 1)
(Note 2)
(Note 2)
(Note 2)
10
9
MHz
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
45
45
51
51
2
2
240
240
13
10
240
240
15
10
36
36
36
40
40
40
ISC Timing
(3.0 V to 3.6 V Versions)
NOTES:
1. Programmed to all zeros before erase.
2. The Polling Status DQ7 is valid t
Q7VQV
ns before the data byte DQ0-7 is valid for reading.
Symbol
Parameter
Min
Typ
Max
Unit
t
EEHWL
t
BLC
t
WCB
t
WCP
Write Protect After Power Up
5
msec
EEPROM Byte Load Cycle Timing (Note 1)
0.2
120
μsec
EEPROM Byte Write Cycle Time
4
10
msec
EEPROM Page Write Cycle Time (Note 2)
6
30
msec
Program/Erase Cycles (Per Sector)
10,000
cycles
EEPROM Write Times
(3.0 V to 3.6 V Versions)
NOTES:
1. If the maximum time has elapsed between successive writes to an EEPROM page, the transfer of this data to EEPROM cells will
begin. Also, bytes cannot be written (loaded) to a page any faster than the indicated minimum type.
2. These specifications are for writing a page to EEPROM cells.
NOTES:
1. For “non-PLD” programming, erase or in ISC by-pass mode.
2. For program or erase PLD only.
相關(guān)PDF資料
PDF描述
PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging
PSD913F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD934F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD913F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD934F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD913F2-12B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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