參數(shù)資料
型號(hào)： PSD913F2
英文描述： 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads
中文描述： 可配置的存儲(chǔ)系統(tǒng)級(jí)芯片的8位微控制器
文件頁(yè)數(shù)： 27/94頁(yè)
文件大?。?/td> 463K
代理商： PSD913F2
PSD913F1
Preliminary
26
9.1.1.7.2 Data Toggle
Checking the Data Toggle bit on DQ6 is a method of determining whether a Program or
Erase instruction is in progress or has completed. Figure 6 shows the Data Toggle
algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD913F1 begins. The MCU then reads the location of the byte to be programmed in
Flash to check status. Data bit DQ6 of this location will toggle each time the MCU reads
this location until the embedded algorithm is complete. The MCU continues to read this
location, checking DQ6 and monitoring the Error bit on DQ5. When DQ6 stops toggling
(two consecutive reads yield the same value), and the Error bit on DQ5 remains
‘
0
’
, then
the embedded algorithm is complete. If the Error bit on DQ5 is
‘
1
’
, the MCU should test
DQ6 again, since DQ6 may have changed simultaneously with DQ5 (see Figure 6).
The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded
algorithm attempted to program the byte, or if the MCU attempted to program a
‘
1
’
to a bit
that was not erased (not erased is logic
‘
0
’
).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the byte that was written to Flash with
the byte that was intended to be written.
When using the Data Toggle method after an erase instructin, Figure 6 still applies. DQ6 will
toggle until the erase operation is complete. A
‘
1
’
on DQ5 will indicate a timeout failure of
the erase operation, a
‘
0
’
indicates no error. The MCU can read any location within the
sector being erased to get DQ6 and DQ5.
PSDsoft will generate ANSI C code functions which implement these Data Toggling
algorithms.
The
PSD913F1
Functional
Blocks
(cont.)
Figure 6. Data Toggle Flow Chart
START
READ
DQ5 & DQ6
NO
YES
NO
YES
YES
NO
=
TOGGLE
DQ5
=1
=
TOGGLE
READ DQ6
FAIL
PASS
相關(guān)PDF資料
PDF描述
PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging
PSD913F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
PSD934F2(中文) Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
PSD913F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
PSD934F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD913F2-12B81 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12B81I 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12J 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JI 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JIT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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