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| 型號： | PSD913F2 |
| 英文描述： | 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA7260 with optional Total Dose Rating of 300kRads |
| 中文描述： | 可配置的存儲系統(tǒng)級芯片的8位微控制器 |
| 文件頁數(shù)： | 54/94頁 |
| 文件大?。?/td> | 463K |
| 代理商： | PSD913F2 |
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Preliminary
PSD913F1
53
The
PSD913F1
Functional
Blocks
(cont.)
9.4.6 Port C – Functionality and Structure
Port C can be configured to perform one or more of the following functions (see Figure 23):
J
MCU I/O Mode
J
PLD Input
–
Input to the PLDs.
J
Address In
–
Additional high address inputs using the Input Micro
Cells.
J
In-System Programming
–
JTAG port can be enabled for programming/erase of the
PSD913F1 device. (See Section 9.6 for more information on JTAG programming.)
Pins that are configured as JTAG pins in PSDsoft will not be available for other I/O
functions.
J
Open Drain
–
Port C pins can be configured in Open Drain Mode
J
Battery Backup features
–
PC2 can be configured as a Battery Input (Vstby) pin.
PC4 can be configured as a Battery On Indicator output
pin, indicating when Vcc is less than Vbat.
Port C does not support Address Out mode, and therefore no Control Register is required.
Pin PC7 may be configured as the DBE input in certain microcontroller interfaces.
9.4.7 Port D – Functionality and Structure
Port D has three I/O pins. See Figure 24. This port does not support Address Out mode,
and therefore no Control Register is required. Port D can be configured to perform one or
more of the following functions:
J
MCU I/O Mode
J
GPLD Output
–
Combinatorial PLD output (external chip selects)
J
PLD Input
–
direct input to PLDs
J
Slew rate
–
pins can be set up for fast slew rate
Port D pins can be configured in PSDsoft as input pins for other dedicated functions:
J
PD0
–
ALE, as address strobe input
J
PD1
–
CLKIN, as clock input to the PLD and APD counter
J
PD2
–
CSI, as active low chip select input. A high input will disable the
Flash/SRAM and CSIOP.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD913F2V | 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging |
| PSD913F2(中文) | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD934F2(中文) | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD913F2 | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD934F2 | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD913F2-12B81 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2-12B81I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2-12J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2-12JI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2-12JIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
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