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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 2: Overview
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
2-102
Note that this capability is useful for low/medium speed software implemented
protocols, as well as for observing switches, driving LEDs etc. It is highly
recommended to rst use the powerful GPIO pins as protocol emulators, and not just
for static switches/LEDs (for which a solution such as a PCF8574 I2C parallel I/O is
ne).
10.1.2
Timestamping
The GPIO module contains 12 timestamp units, each of which can be designated to
monitor an external GPIO pin or internal system event. For a monitored event, a
timestamp unit can be set to trigger on a rising edge, falling edge or either edge.
When a trigger occurs, a precise occurrence time (31-bit timestamp value, 75 ns
resolution) is put in a register, and an interrupt is generated.
This capability is particularly valuable for precise monitoring of key audio/video events
and controlling the internal software phase-locked loops that lock to broadcast time
references. It can also be used for medium speed signal analysis.
10.1.3
Event sequence monitoring and signal generation
GPIO contains 4 queue units, each capable of monitoring or generating high-speed
signals on up to 4 GPIO pins.
This capability creates a universal protocol emulator, capable of emulating many
medium speed (0 - 20 Mbit/s) protocols using software on the TM3260 media
processor. Complex protocols, such as the MemoryStickTM protocol with 20 Mbits/s
peak rate and 800 KB/s sustained le transfer rate have been successfully
implemented on the PNX8525 GPIO module. The PNX15xx/952x Series GPIO is
similar to the PNX8525 GPIO module.
High speed signal analysis uses one of two modes:
event queue hardware samples 1, 2 or 4 GPIO inputs using one out of a variety of
clocks in the system, including clock inputs or clocks generated from other GPIO
pins. Samples are packed in a word and stored in a list in system memory for
software analysis.
event queue hardware builds an in-system memory list of timestamped GPIO pin
change events, individual per monitored GPIO pin. Edge events are timestamped
with 75 ns resolution.
Signal generation uses the same 2 features, but in reverse, i.e. a sampled signal is
transmitted, or an in-memory timestamped list of change events is output over a pin.
The event sequence monitoring mechanism can be used for many functions, and is
particularly useful for interpreting Remote Control commands, as described in
Section 10.2. Signal generation is useful for RC Blaster applications.
The GPIO module has a total of 4 complex signal analysis/signal synthesis resources
capable of sampling or timestamped list generation/creation.
10.1.4
GPIO pin reset value
Dedicated GPIO pins come in two types: