參數(shù)資料
型號(hào): OR4E2
廠商: Lineage Power
英文描述: Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
中文描述: 現(xiàn)場可編程門陣列(現(xiàn)場可編程門陣列)
文件頁數(shù): 98/132頁
文件大小: 2667K
代理商: OR4E2
98
Lucent Technologies Inc.
Preliminary Data Sheet
August 2000
ORCA Series 4 FPGAs
Ball
Bank
Pad
Function
Pair*
Differential
AC29
AB28
AC30
AC31
AB29
AB30
AB31
AA29
Y28
AA30
AA31
Y29
W28
Y30
W29
W30
V28
W31
V29
V30
V31
U29
U30
U31
T30
T28
T29
R31
R30
R29
P31
P30
BL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
PL38D
PL37C
PL37D
PL36C
PL36D
PL35C
PL35D
PL34C
PL34D
PL32C
PL32D
PL31D
V
DD
IO
PL30C
PL30D
PL29C
PL29D
PL28C
PL28D
PL26C
PL26D
PL25C
PL25D
V
DD
IO
PL24C
PL24D
PL23C
PL23D
PL21C
PL21D
PL20C
PL20D
D8
DP1
DP0
A0
A1
A2
A3
VREF
A4
VREF
L1C_D0
L18T_D1
L18C_D1
L17T_D1
L17C_D1
L16T_A0
L16C_A0
L15T_D0
L15C_D0
L14T_A0
L14C_A0
L13T_D0
L13C_D0
L12T_D1
L12C_D1
L11T_D1
L11C_D1
L10T_A0
L10C_A0
L9T_A0
L9C_A0
L8T_A1
L8C_A1
L7T_D1
L7C_D1
L6T_A0
L6C_A0
L5T_A0
L5C_A0
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
WR/MPI_RW
A5
A6
A7
VREF
PLCK1T/SCKB
PLCK1C
VREF
A8
A9
A10
PLCK0T/SCKA
PLCK0C
VREF
RD/MPI_STRB
VREF
A11
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
TRUE
COMPLEMENT
Pin Information
(continued)
Table 45. OR4E6 432-Pin EBGA
(continued)
* Differential pairs and physical locations are numbered within each bank (e.g., L19C_A0 is ninteenth pair in an associated bank). The C indi-
cates complementary differential whereas a T indicates true differential. The _A0 indicates the physical location is adjacent balls in either hor-
zontal/vertical direction. Other physical indicators are as follows:
_A1 indicates one ball between pairs.
_A2 indicates two balls between pairs.
_D0 indicates balls are diagonally adjacent.
_D1 indicates diagonally adjacent separated by one physical ball.
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