參數(shù)資料
型號: OR4E2
廠商: Lineage Power
英文描述: Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
中文描述: 現(xiàn)場可編程門陣列(現(xiàn)場可編程門陣列)
文件頁數(shù): 127/132頁
文件大?。?/td> 2667K
代理商: OR4E2
Lucent Technologies Inc.
127
Preliminary Data Sheet
August 2000
ORCA Series 4 FPGAs
Ball
Bank
Pad
Function
Pair*
Differential
L1
M3
R3
U1
W1
Y3
AC3
AD1
CL
CL
CL
CL
CL
CL
CL
CL
V
DD
IO
V
DD
IO
V
DD
IO
V
DD
IO
V
DD
IO
V
DD
IO
V
DD
IO
V
DD
IO
Pin Information
(continued)
Table 46. OR4E6 680-Pin PBGAM Pinout
(continued)
* Differential pairs and physical locations are numbered within each bank (e.g., L19C_A0 is ninteenth pair in an associated bank). The C indi-
cates complementary differential whereas a T indicates true differential. The _A0 indicates the physical location is adjacent balls in either hor-
zontal/vertical direction. Other physical indicators are as follows:
_A1 indicates one ball between pairs.
_A2 indicates two balls between pairs.
_D0 indicates balls are diagonally adjacent.
_D1 indicates diagonally adjacent separated by one physical ball.
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