參數(shù)資料
型號(hào): MT48LC32M4A2P-7ELIT:G
元件分類(lèi): DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁(yè)數(shù): 60/74頁(yè)
文件大?。?/td> 2385K
PDF: 09005aef8091e66d/Source: 09005aef8091e625
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128MSDRAM_2.fm - Rev. N 1/09 EN
63
1999 Micron Technology, Inc. All rights reserved.
128Mb: x4, x8, x16 SDRAM
Timing Diagrams
Figure 47:
READ – Full-Page Burst
Notes:
1. For this example, CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
x8: A11 = “Don’t Care.”
3. Page left open; no tRP.
tCH
tCL
tCK
tAC
tLZ
tRCD
CAS Latency
DQM /
DQML, DQMH
CKE
CLK
A0–A9, A11
DQ
BA0, BA1
A10
tOH
DOUT m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAC
tOH
DOUT m+1
ROW
tHZ
tAC
tOH
DOUT m+1
tAC
tOH
DOUT m+2
tAC
tOH
DOUT m-1
tAC
tOH
DOUT m
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
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Full page completed
512 (x16) locations within same row
1,024 (x8) locations within same row
2,048 (x4) locations within same row
DON’T CARE
UNDEFINED
COMMAND
tCMH
tCMS
NOP
ACTIVE
NOP
READ
NOP
BURST TERM
NOP
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NOP
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tAH
tAS
BANK
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BANK
tCKH
tCKS
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COLUMN m 2
3
T0
T1
T2
T4
T3
T5
T6
Tn + 1
Tn + 2
Tn + 3
Tn + 4
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