參數(shù)資料
型號(hào)： MT48LC32M4A2P-7ELIT:G
元件分類(lèi)： DRAM
英文描述： 32M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁(yè)數(shù)： 6/74頁(yè)
文件大?。?/td> 2385K
PDF: 09005aef8091e66d/Source: 09005aef8091e625
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128MSDRAM_2.fm - Rev. N 1/09 EN
14
1999 Micron Technology, Inc. All rights reserved.
128Mb: x4, x8, x16 SDRAM
Pin/Ball Descriptions
2, 4, 5, 7, 8,
10, 11, 13,
42, 44, 45,
47, 48, 50,
51, 53
A8, B9, B8,
C9, C8, D9,
D8, E9, E1,
D2, D1, C2,
C1, B2, B1,
A2
–
DQ0–
DQ15
x16: I/O Data input/output: Data bus for x16 (pins 4, 7, 10, 13, 42,
45, 48, and 51 are NCs for x8; and 2, 4, 7, 8, 10, 13, 42, 45,
47, 48, 51, and 53 are NCs for x4).
2, 5, 8, 11,
44, 47, 50,
53
–
A8, C7, D8,
F7, F2, D1,
C2, A1
DQ0–DQ7
x8: I/O
Data input/output: Data bus for x8 (pins 2, 8, 47, and 53
are NCs for x4; balls A8, D8, D1, and A1 are NCs for x4).
5, 11, 44, 50
–
C7, F7, F2,
C2
DQ0–DQ3
x4: I/O
Data input/output: Data bus for x4.
40
E2
B1, B8, D2,
D7, E1, E8,
G1, G2, G7,
G8, H1, H8,
J1, K1, K8,
L7
NC
–
No connect: These pins should be left unconnected.
36
G1
L1
NC
–
Address input (A12) for the 256Mb and 512Mb devices.
3, 9, 43, 49
A7, B3, C7,
D3
B7, C1, E7,
F1
VDDQ
Supply
DQ power: Isolated DQ power on the die for improved
noise immunity.
6, 12, 46, 52
A3, B7, C3,
D7
B2, C8, E2,
F8
VSSQ
Supply
DQ ground: Isolated DQ ground on the die for improved
noise immunity.
1, 14, 27
A9, E7, J9
A7, R7
VDD
Supply
Power supply: +3.3 ±0.3V.
28, 41, 54
A1, E3, J1
A2, H2, R2
VSS
Supply
Ground.
Table 4:
Pin/Ball Descriptions (Continued)
54-Pin TSOP
54-Ball
VFBGA
60-Ball
FBGA
Symbol
Type
Description
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