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MOTOROLA
Illustrations
xxiii
ILLUSTRATIONS
Figure
Number
Title
Page
Number
6-19
6-20
6-21
6-22
SDRAM Memory Interface Block Diagram......................................................6-31
SDRAM Data Bus Lane Assignments...............................................................6-32
Example128 Mbyte SDRAM Configuration With Parity..................................6-34
SDRAM Address Multiplexing SDBA[1D0] and SDMA[12-0]32-Bit
Mode................................................................................................................6-37
SDRAM Address Multiplexing SDBA[1D0] and SDMA[12D0]64-Bit
Mode................................................................................................................6-38
SDRAM Flow-Through Memory Interface.......................................................6-40
SDRAM Registered Memory Interface.............................................................6-41
SDRAM In-line ECC/Parity Memory Interface................................................6-41
PGMAX Parameter Setting for SDRAM Interface ...........................................6-45
SDRAM Single-Beat Read Timing (SDRAM Burst Length = 4).....................6-50
SDRAM Four-Beat Burst Read Timing Configuration64-Bit Mode ............6-51
SDRAM Eight-Beat Burst Read Timing Configuration32-Bit Mode...........6-51
SDRAM Single Beat Write Timing (SDRAM Burst Length = 4).....................6-52
SDRAM Four-Beat Burst Write Timing64-Bit Mode...................................6-52
SDRAM Eight-Beat Burst Write Timing32-Bit Mode..................................6-53
SDRAM Mode Register Set Timing..................................................................6-53
Registered SDRAM DIMM Single Beat Write Timing ....................................6-55
Registered SDRAM DIMM Burst-Write Timing..............................................6-56
SDRAM Bank Staggered CBR Refresh Timing................................................6-58
SDRAM Self Refresh Entry...............................................................................6-60
SDRAM Self Refresh Exit.................................................................................6-60
ROM Memory Interface Block Diagram...........................................................6-61
16-Mbyte ROM System Including Parity Paths to DRAM64-Bit Mode.......6-62
1-Mbyte Flash Memory System Including Parity Paths to DRAM8-Bit
Mode................................................................................................................6-63
ROM/Flash Address Multiplexing8-Bit Mode..............................................6-65
ROM/Flash Address Multiplexing32-Bit Mode............................................6-66
ROM/Flash Address Multiplexing64-Bit Mode............................................6-66
Non Burst ROM/Flash Read Access Timing32- or 64-Bit Mode..................6-68
Burst ROM/Flash Read Access Timing (Cache Block)64-Bit Mode............6-68
Burst ROM/Flash Read Access Timing (Cache Block)32-Bit Mode............6-68
8-Bit ROM/Flash Read Access Timing.............................................................6-70
8-, 32-, or 64-Bit Flash Write Access Timing ...................................................6-71
Port X Peripheral Interface Block Diagram.......................................................6-72
Example of Port X Peripheral Connected to the MPC8240 ..............................6-74
Example of Port X Peripheral Connected to the MPC8240 ..............................6-74
Port X Example Read Access Timing ...............................................................6-75
Port X Example Write Access Timing...............................................................6-75
MPC8240 Internal Buffer Organization ..............................................................7-2
Processor/System Memory Buffers.....................................................................7-3
Processor/PCI Buffers..........................................................................................7-4
6-23
6-24
6-25
6-26
6-27
6-28
6-29
6-30
6-31
6-32
6-33
6-34
6-35
6-36
6-37
6-38
6-39
6-40
6-41
6-42
6-43
6-44
6-45
6-46
6-47
6-48
6-49
6-50
6-51
6-52
6-53
6-54
6-55
7-1
7-2
7-3