參數(shù)資料
型號(hào)： AM79C970
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線
文件頁數(shù)： 47/168頁
文件大小： 943K
代理商： AM79C970
AMD
P R E L I M I N A R Y
1-914
Am79C970
entry. A device may, however, read from a descriptor
that it does not currently own. Software should always
read descriptor entries in sequential order. When soft-
ware finds that the current descriptor is owned by the
PCnet-PCI controller, then the software must not read
“ahead” to the next descriptor. The software should wait
at the unOWNed descriptor until ownership has been
granted to the software (when SPRINTEN = 1 (CSR3,
bit 5), then this rule is modified. See the SPRINTEN de-
scription). Strict adherence to these rules insures that
“Deadly Embrace” conditions are avoided.
Descriptor Ring Access Mechanism
At initialization, the PCnet-PCI controller reads the base
address of both the transmit and receive descriptor rings
into CSRs for use by the PCnet-PCI controller during
subsequent operations.
As the final step in the self-initialization process, the
base address of each ring is loaded into each of the cur-
rent descriptor address registers and the address of the
next descriptor entry in the transmit and receive rings is
computed and loaded into each of the next descriptor
address registers.
When SSIZE32 = 0, software data structures are 16 bits
wide. The following diagram, Figure 22, illustrates the
relationship between the Initialization Base Address,
the Initialization Block, the Receive and Transmit De-
scriptor Ring Base Addresses, the Receive and Trans-
mit Descriptors and the Receive and Transmit Data
Buffers, for the case of SSIZE32 = 0.
Initialization
Block
MODE
PADR[15:0]
PADR[31:16]
PADR[47:32]
LADRF[15:0]
LADRF[31:16]
LADRF[47:32]
LADRF[63:48]
RDRA[15:0]
RES
24-Bit Base Address
Pointer to
Initialization Block
IADR[15:0]
IADR[23:16]
RES
CSR1
CSR2
TDRA[15:0]
RES
RLEN
RDRA[23:16]
TLEN
TDRA[23:16]
Rcv
Buffers
RMD0
RMD1RMD2
RMD3
Rcv Descriptor
Ring
N
N
N
N
1st desc.
start
2nd desc.
start
RMD0
Xmt
Buffers
RX DESCRIPTOR RINGS
1st desc.
start
TMD0
TMD1
TMD2
TMD3
RX DESCRIPTOR RINGS
Xmt Descriptor
M
M
M
M
2nd desc.
start
TMD0
Data
Buffer
N
Data
Buffer
1
Data
Buffer
2
Data
Buffer
M
Data
Buffer
1
Data
Buffer
2
18220C-24
Figure 22
.
16-Bit Data Structures: Initialization Block and Descriptor Rings
相關(guān)PDF資料
PDF描述
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971 PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:
AM79C970AKC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*