- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C970 (Advanced Micro Devices, Inc.) PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus PDF資料下載
參數(shù)資料
| 型號： | AM79C970 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| 中文描述： | PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線 |
| 文件頁數(shù)： | 165/168頁 |
| 文件大?。?/td> | 943K |
| 代理商： | AM79C970 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁當前第165頁第166頁第167頁第168頁
AMD
1-1032
Am79C970
DATA SHEET REVISION SUMMARY
The following list represents the key differences be-
tween revision B (May 1994) and revision C (June
1994).
Global Change
DWIO mode cannot be set by reading the EEPROM or
writing directly to BCR18.
The Initialization Block must be on a double-word
boundary.
Detailed Functions
Page 1-888:
The section on PCnet-PCI controller I/O Resource Map-
ping is rewritten to reflect changes in methods of setting
DWIO mode.
User Accessible Registers
Page 1-955:
CSR1
The description for Initialization Block boundary require-
ment is rewritten for clarity.
Page 1-967:
CSR58
The description for bit 8 (SSIZE32) is rewritten for
clarity.
Page 1-982:
BCR18
The description for bit 7 (DWIO) is rewritten for clarity.
The following list represents the key differences be-
tween revision A (October 1993) and revision B (April
1994).
Page 1-987:
BCR20
The description for bit 8 (SSIZE32) is rewritten for
clarity.
Global Change
Look-Ahead Packet Processing (LAPP)is the name for
the early protocol analysis.
Block Diagram
Page 1-869:
The
LOCK
pin is changed from bidirectional to unidirec-
tional. It is now an input only. The EESK/
LED1
pin is now
changed to bidirectional for typographical correction.
Connection Diagram
Page 1-877:
Various pin names have been changed for either en-
hanced clarity or to correct typographical errors.
The pins that are affected are 9, 58, 91, 94, 96, 97, 98,
100, 103, 108, 116, and 127.
Pin Designations
Page 1-879:
Various pin names have been changed for either en-
hanced clarity or to correct typographical errors.
The pins that are affected are 9, 58, 91, 94, 96, 97, 98,
100, 103, 108, 116, and 127.
Page 1-880:
The
LOCK
pin is changed from an I/O to an input. No
driver type is available.
Page 1-881:
The I
OH
value for TS3 and TS6 are now –2. Driver type
O6 is removed. Driver type O8 is added.
Pin Description
Page 1-882:
Pin descriptions for various pins were rewritten for clar-
ity. The pins are
GNT
,
LOCK
, and
PERR
.
Detailed Functions
Page 1-937:
Table 8
EEPROM Contents—Corrected the Hardware ID (byte
address 09h) value to 11h.
Page 1-944:
Figure 30
NAND Tree—Typographical errors were corrected.
User Accessible Regisers
Page 1-956:
CSR3
The bit name for bit 5 is changed to LAPPEN (Look-
Ahead Packet Processing ENable).
Page 1-958:
CSR4
The bit name for bit 9 is changed to MFCO (Missed
Frame Counter Overflow), and the bit name for bit 8 is
changed to MFCOM (Missed Frame Counter Overflow
Mask).
Page 1-971:
CSR80—The description for bits 9–8 is rewritten for
clarity.
Page 1-974:
CSR89—The upper 12 bits of the PCnet–PCI controller
part number contained in bits 11–0 are corrected. The
12 bits now read 0010 0100 0011b.
CSR90—The description for this register is removed,
because it is now a reserved register.
Page 1-975:
CSR124—The description for bit 3 is rewritten for
clarity.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C971VCW | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971 | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971KCW | IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE |
| AM79C972BKCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C970A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AKC\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。