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參數(shù)資料
| 型號： | AM79C970 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| 中文描述： | PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線 |
| 文件頁數(shù)： | 40/168頁 |
| 文件大?。?/td> | 943K |
| 代理商： | AM79C970 |
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P R E L I M I N A R Y
AMD
1-907
Am79C970
Partial Linear Burst
Certain factors may cause the PCnet-PCI controller to
burst fewer than the LINBC limit during a single burst se-
quence. Factors that could generate a partial linear
burst include:
No more data available for transfers from the
current TX buffer
No more data available for transfer from the RX
FIFO for this packet
No more space available for transfers to the
current RX buffer
Preemption
Typically, during the case of a master read operation (for
TX buffer transfers), the last transfer in the linear burst
sequence will be the last transfer executed before the
PCnet-PCI controller releases the bus. This is true of
both partial and completed linear burst sequences.
During the case of a master write operation (for RX
buffer transfers) when RX packet data has ended, the
last transfer in the linear burst sequence will be the last
transfer executed before the PCnet-PCI controller re-
leases the bus. This is true of both partial and completed
linear burst sequences.
However, if the next transfer that the PCnet-PCI control-
ler is scheduled to execute will be to the last available
location of a RX buffer, then the PCnet-PCI controller
will use a non-burst cycle to make the last transfer to the
buffer. This event occurs because of the restrictions
placed upon the byte enable signals during the linear
burst operation. As mentioned in the initial description of
linear burst accesses, all byte lanes of the data bus are
always enabled during linear burst operations. Note,
however, that in the case of the last RX buffer location,
the PCnet-PCI controller may own only a portion of the
DWORD location. In such cases, it is necessary to dis-
continue linear burst accesses on the second from last
RX buffer location so that an ordinary transfer with some
byte lanes disabled can be used for the final transfer.
相關(guān)PDF資料 |
PDF描述 |
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| AM79C971VCW | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971 | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971KCW | IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE |
| AM79C972BKCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C970A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AKC\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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