參數(shù)資料
型號(hào): AM79C970
廠商: Advanced Micro Devices, Inc.
英文描述: PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述: PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線
文件頁(yè)數(shù): 111/168頁(yè)
文件大?。?/td> 943K
代理商: AM79C970
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AMD
P R E L I M I N A R Y
1-978
Am79C970
port when the PORTSEL bits of
the Mode Register (CSR15)
have selected 10BASE-T as the
active port.
When ASEL is set to a ZERO,
then the selected network port
will be determined by the settings
of the PORTSEL bits of CSR15.
The ASEL bit is reset to ONE by
H_RESET and is unaffected by
S_RESET or STOP.
The network port configurations
are as follows:
PORTSEL
CSR15[1:0]
0 X
0 X
0 0
0 1
1 0
1 1
ASEL
(BCR2[1])
1
1
0
0
X
X
LINK Status
(of 10BASE-T)
Fail
Pass
X
X
X
X
Network
Port
AUI
10BASE-T
AUI
10BASE-T
Reserved
Reserved
0
XMAUSEL
Reserved location. The default
value of this bit is a ZERO. Writ-
ing a ONE to this bit has no effect
on the operation of the device.
Existing drivers may write a ONE
to this bit, but new drivers should
write a ZERO to this bit.
BCR4: Link Status LED (LNKST)
Bit
Name
Description
BCR4 controls the function(s)
that the
LNKST
pin displays.
Multiple functions can be simul-
taneously enabled on this LED
pin. The LED display will indicate
the logical OR of the enabled
functions. BCR4 defaults to Link
Status (LNKST) with pulse
stretcher enabled (PSE = 1) and
is fully programmable.
The default setting after H_RE-
SET for the LNKST register is
00C0h. The LNKST register
value is unaffected by S_RESET
or STOP.
Reserved locations. Written as
ZEROs and read as undefined.
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of ONE in this
bit indicates that the OR of the
enabled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
31–16
RES
15
LEDOUT
Enable bits of the LED register
(Bits 6–0).
This bit is READ only by the host,
and is unaffected by H_RESET,
S_RESET or STOP.
LED Polarity. When this bit has
the value ZERO, then the LED
pin will be driven to a LOW level
whenever the OR of the enabled
signals is true and the LED pin
will be disabled and allowed to
float high whenever the OR of the
enabled signals is false. (i.e. the
LED output will be an Open Drain
output and the output value will
be the inverse of the LEDOUT
status bit.)
When this bit has the value ONE,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false. (i.e.
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit.)
The setting of this bit will not af-
fect the polarity of the LEDOUT
bit for this register.
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value ONE, then
the LED output will always be
floated. When LEDDIS has the
value ZERO, then the LED out-
put value will be governed by the
LEDOUT and LEDPOL values.
Reserved locations. Write as ZE-
ROS, read as undefined.
A value of 0 disables the signal.
A value of 1 enables the signal.
Pulse Stretcher Enable. Extends
the LED illumination time for
each new occurrence of the en-
abled function for this LED
output.
A value of 0 disables the function.
A value of 1 enables the function.
Link Status Enable. Indicates the
current link status on the Twisted
Pair interface. When this bit is set
to one, a value of ONE will be
passed to the LEDOUT signal to
indicate that the link status state
is PASS. A value of ZERO will be
passed to the LEDOUT signal to
indicate that the link status state
is FAIL.
14
LEDPOL
13
LEDDIS
12–8
RES
7
PSE
6
LNKSTE
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