參數(shù)資料
型號： MC68HC11F1CPU4
廠商： Freescale Semiconductor
文件頁數(shù)： 94/158頁
文件大小： 0K
描述： IC MCU 512 EEPROM 4MHZ 80-LQFP
標準包裝： 90
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 4MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲器類型： ROMless
EEPROM 大小： 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-LQFP
包裝： 托盤
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11F1
4-2
TECHNICAL DATA
The bootstrap ROM contains a small program which initializes the SCI and allows the
user to download a program of up to 1024 bytes into on-chip RAM. After a four-char-
acter delay, or after receiving the character for address $03FF, control passes to the
loaded program at $0000. An external pull-up resistor is required when using the SCI
transmitter pin (TxD) because port D pins are configured for wired-OR operation by
the bootloader. In bootstrap mode, the interrupt vectors point to RAM. This allows the
use of interrupts through a jump table. Refer to Freescale application note AN1060,
M68HC11 Bootstrap Mode.
4.2 On-Chip Memory
The MC68HC11F1 contains 1024 bytes of on-chip RAM and 512 bytes of EEPROM.
The bootloader ROM occupies 256 bytes. The CONFIG register is implemented as a
separate EEPROM byte.
4.2.1 Mapping Allocations
Memory locations for on-chip resources are the same for both expanded and single-
chip modes. The 96-byte register block originates at $1000 after reset and can be
placed at any other 4-Kbyte boundary ($x000) after reset by writing an appropriate val-
ue to the INIT register. Refer to Figure 4-1, which illustrates the memory map.
The on-board 1024-byte RAM is initially located at $0000 after reset. If RAM and reg-
isters are both mapped to the same 4-Kbyte boundary, the first 96 bytes of RAM are
inaccessible (registers have higher priority). Remapping is accomplished by writing
appropriate values to the INIT register.
The 512-byte EEPROM array is initially located at $FE00 after reset when EEPROM
is enabled in the memory map by the CONFIG register. In expanded and special test
modes EEPROM can be placed at any other 4-Kbyte boundary ($xE00) by program-
ming bits EE[3:0] in the CONFIG register to an appropriate value. In single-chip and
bootstrap modes the EEPROM is forced on and cannot be remapped.
In special bootstrap mode, a bootloader ROM is enabled at locations $BF00–$BFFF.
The vectors for special bootstrap mode are contained in the bootloader program. The
boot ROM fills 256 bytes of the memory map even though not all locations are used.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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