參數(shù)資料
型號: MC68HC11F1CPU4
廠商: Freescale Semiconductor
文件頁數(shù): 143/158頁
文件大?。?/td> 0K
描述: IC MCU 512 EEPROM 4MHZ 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 4MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 30
程序存儲器類型: ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
PARALLEL INPUT/OUTPUT
TECHNICAL DATA
6-5
6.7 Port G
Port G pins reset to high-impedance inputs except in expanded modes where reset
causes PG7 to become the CSPROG output. Alternate functions for port G bits [7:4]
are chip select outputs. All port G bits are bidirectional and have corresponding data
direction bits.
The GWOM control bit in the OPT2 register disables port G's P-channel output drivers.
Because the N-channel driver is not affected by GWOM, setting GWOM causes port
G to become an open-drain-type output port suitable for wired-OR operation. In wired-
OR mode, (PORTG bits are at logic level zero), pins are actively driven low by the N-
channel driver. When a port G bit is at logic level one, the associated pin is in a high-
impedance state, as neither the N-channel nor the P-channel devices are active. It is
customary to have an external pull-up resistor on lines that are driven by open-drain
devices. Port G can be configured for wired-OR operation in any operating mode.
DDG[7:0] — Data Direction for Port G
0 = Input
1 = Output
6.8 System Configuration Options 2
The system configuration options 2 register controls several configuration parameters.
Bit 6, CWOM, is the only bit in this register that directly affects parallel I/O.
PORTF — Port F Data
$1005
Bit 7
654321
Bit 0
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
S. Chip
or Boot:
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
RESET:
0000000
0
Expan.
or Test:
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
PORTG — Port G Data
$1002
Bit 7
654321
Bit 0
PG7
PG6
PG5
PG4
PG3
PG2
PG1
PG0
RESET:
IIIIIII
I
Alt. Pin
Func.: CSPROG
CSGEN
CSIO1
CSIO2
DDRG — Data Direction Register for Port G
$1003
Bit 7
654321
Bit 0
DDG7
DDG6
DDG5
DDG4
DDG3
DDG2
DDG1
DDG0
RESET:
0000000
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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