參數(shù)資料
型號: MC68HC11F1CPU4
廠商: Freescale Semiconductor
文件頁數(shù): 119/158頁
文件大?。?/td> 0K
描述: IC MCU 512 EEPROM 4MHZ 80-LQFP
標準包裝: 90
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 4MHz
連通性: SCI,SPI
外圍設備: POR,WDT
輸入/輸出數(shù): 30
程序存儲器類型: ROMless
EEPROM 大小: 512 x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉換器: A/D 8x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
RESETS AND INTERRUPTS
TECHNICAL DATA
5-1
SECTION 5 RESETS AND INTERRUPTS
Resets and interrupt operations load the program counter with a vector that points to
a new location from which instructions are to be fetched. A reset causes the internal
control registers to be initialized to a known state. The program counter is loaded with
a known starting address and execution of instructions begins. An interrupt temporarily
suspends normal program execution while an interrupt service routine is being execut-
ed. After an interrupt has been serviced, the main program resumes as if there had
been no interruption.
5.1 Resets
There are four possible sources of reset. Power-on reset (POR) and external reset
share the normal reset vector. The computer operating properly (COP) reset and the
clock monitor reset each has its own vector.
5.1.1 Power-On Reset
A positive transition on VDD generates a power-on reset (POR), which is used only for
power-up conditions. POR cannot be used to detect drops in power supply voltages.
A 4064 tcyc (internal clock cycle) delay after the oscillator becomes active allows the
clock generator to stabilize. If RESET is at logical zero at the end of 4064 tcyc, the CPU
remains in the reset condition until RESET goes to logical one.
It is important to protect the MCU during power transitions. To protect data in EE-
PROM, M68HC11 systems need an external circuit that holds the RESET pin low
whenever VDD is below the minimum operating level. This external voltage level de-
tector, or other external reset circuits, are the usual source of reset in a system. The
POR circuit only initializes internal circuitry during cold starts. Refer to Figure 2–3.
5.1.2 External Reset (RESET)
The CPU distinguishes between internal and external reset conditions by sensing
whether the reset pin rises to a logic one in less than two E-clock cycles after an inter-
nal device releases reset. When a reset condition is sensed, the RESET pin is driven
low by an internal device for four E-clock cycles, then released. Two E-clock cycles
later it is sampled. If the pin is still held low, the CPU assumes that an external reset
has occurred. If the pin is high, it indicates that the reset was initiated internally by ei-
ther the COP system or the clock monitor. It is not advisable to connect an external
resistor capacitor (RC) power-up delay circuit to the reset pin of M68HC11 devices be-
cause the circuit charge time constant can cause the device to misinterpret the type of
reset that occurred.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關PDF資料
PDF描述
MC68HRC908JK3CDW IC MCU 4K FLASH 8MHZ SO20
MC68HC711K4CFU4 IC MCU 24K 4MHZ EEPROM 80-QFP
MC68HC11K1CFN4 IC MCU 640 EEPROM 4MHZ 84-PLCC
MC68332ACFC20B1 IC MCU 32BIT 20MHZ 132-PQFP
MC68332GCFC16 IC MCU 32BIT 16MHZ 132-PQFP
相關代理商/技術參數(shù)
參數(shù)描述
MC68HC11F1CPU5 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Technical Summary 8-Bit Microcontroller
MC68HC11F1CPUE5 制造商:Freescale Semiconductor 功能描述:
MC68HC11F1FB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers
MC68HC11F1FB1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers
MC68HC11F1FB3 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers