參數(shù)資料
型號: MC68HC11F1CPU4
廠商: Freescale Semiconductor
文件頁數(shù): 88/158頁
文件大?。?/td> 0K
描述: IC MCU 512 EEPROM 4MHZ 80-LQFP
標準包裝: 90
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 4MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 30
程序存儲器類型: ROMless
EEPROM 大小: 512 x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
CENTRAL PROCESSING UNIT
TECHNICAL DATA
3-11
COM (opr)
Ones
Complement
Memory Byte
$FF – M
M
EXT
IND,X
IND,Y
73
63
18
63
hh ll
ff
6
7
————
01
COMA
Ones
Complement
A
$FF – A
A
A
INH
43
2
————
01
COMB
Ones
Complement
B
$FF – B
B
B
INH
53
2
————
01
CPD (opr)
Compare D to
Memory 16-Bit
D – M : M + 1
IMM
DIR
EXT
IND,X
IND,Y
1A
83
1A
93
1A
B3
1A
A3
CD
A3
jj kk
dd
hh ll
ff
5
6
7
————
CPX (opr)
Compare X to
Memory 16-Bit
IX – M : M + 1
IMM
DIR
EXT
IND,X
IND,Y
8C
9C
BC
AC
CD
AC
jj kk
dd
hh ll
ff
4
5
6
7
————
CPY (opr)
Compare Y to
Memory 16-Bit
IY – M : M + 1
IMM
DIR
EXT
IND,X
IND,Y
18
8C
18
9C
18
BC
1A
AC
18
AC
jj kk
dd
hh ll
ff
5
6
7
————
DAA
Decimal Adjust
A
Adjust Sum to BCD
INH
19
2
————
DEC (opr)
Decrement
Memory Byte
M – 1
M
EXT
IND,X
IND,Y
7A
6A
18
6A
hh ll
ff
6
7
————
DECA
Decrement
Accumulator
A
A – 1
A
A
INH
4A
2
————
DECB
Decrement
Accumulator
B
B – 1
B
B
INH
5A
2
————
DES
Decrement
Stack Pointer
SP – 1
SP
INH
34
3
————————
DEX
Decrement
Index Register
X
IX – 1
IX
INH
09
3
—————
——
DEY
Decrement
Index Register
Y
IY – 1
IY
INH
18
09
4
—————
——
EORA (opr)
Exclusive OR
A with Memory
A
⊕ M A
A
IMM
A
DIR
A
EXT
A
IND,X
A
IND,Y
88
98
B8
A8
18
A8
ii
dd
hh ll
ff
2
3
4
5
————
0—
EORB (opr)
Exclusive OR
B with Memory
B
⊕ M B
B
IMM
B
DIR
B
EXT
B
IND,X
B
IND,Y
C8
D8
F8
E8
18
E8
ii
dd
hh ll
ff
2
3
4
5
————
0—
FDIV
Fractional
Divide 16 by
16
D / IX
IX; r D
INH
03
41
—————
IDIV
Integer Divide
16 by 16
D / IX
IX; r D
INH
02
41
—————
0
INC (opr)
Increment
Memory Byte
M + 1
M
EXT
IND,X
IND,Y
7C
6C
18
6C
hh ll
ff
6
7
————
INCA
Increment
Accumulator
A
A + 1
A
A
INH
4C
2
————
INCB
Increment
Accumulator
B
B + 1
B
B
INH
5C
2
————
INS
Increment
Stack Pointer
SP + 1
SP
INH
31
3
————————
INX
Increment
Index Register
X
IX + 1
IX
INH
08
3
—————
——
Table 3-2 Instruction Set (Sheet 3 of 6)
Mnemonic
Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
X
H
I
N
Z
V
C
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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