參數(shù)資料
型號: MC68HC11F1CPU4
廠商: Freescale Semiconductor
文件頁數(shù): 151/158頁
文件大?。?/td> 0K
描述: IC MCU 512 EEPROM 4MHZ 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 4MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 30
程序存儲器類型: ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
SERIAL COMMUNICATIONS INTERFACE
MC68HC11F1
7-6
TECHNICAL DATA
R8 — Receive Data Bit 8
If M bit is set, R8 stores the ninth bit in the receive data character.
T8 — Transmit Data Bit 8
If M bit is set, T8 stores the ninth bit in the transmit data character.
M — Mode (Select Character Format)
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
WAKE — Wakeup by Address Mark/Idle
0 = Wakeup by IDLE line recognition
1 = Wakeup by address mark (most significant data bit set)
7.6.3 Serial Communications Control Register 2
The SCCR2 register provides the control bits that enable or disable individual SCI
functions.
TIE — Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
TCIE — Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
RIE — Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
ILIE — Idle-Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
TE — Transmitter Enable
When TE goes from zero to one, one unit of idle character time (logic one) is queued
as a preamble.
0 = Transmitter disabled
1 = Transmitter enabled
RE — Receiver Enable
0 = Receiver disabled
1 = Receiver enabled
SCCR2 — SCI Control Register 2
$102D
Bit 7
654321
Bit 0
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
RESET:
0000000
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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