1. For fop < 2 MHz, source imp" />
參數(shù)資料
型號(hào)： MC68HC11F1CPU4
廠商： Freescale Semiconductor
文件頁數(shù)： 52/158頁
文件大?。?/td> 0K
描述： IC MCU 512 EEPROM 4MHZ 80-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 4MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲(chǔ)器類型： ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-LQFP
包裝： 托盤
ELECTRICAL CHARACTERISTICS
TECHNICAL DATA
A-11
NOTES:
1. For fop < 2 MHz, source impedances should equal approximately 10 k. For fop ≥ 2 MHz, source impedances
should equal approximately 5 k
– 10 k. Source impedances greater than 10 k affect accuracy adversely be-
cause of input leakage.
2. Performance verified down to 2.5 V
V
R, but accuracy is tested and guaranteed at VR = 5 V ± 10%
Table A-6 Analog-To-Digital Converter Characteristics
VDD = 5.0 Vdc ± 5%, VSS = 0 Vdc, TA = TL to TH, 750 kHz ≤ E ≤ 3.0 MHz, unless otherwise noted
Characteristic
Parameter
Min
Absolute
2.0 MHz 3.0 MHz 4.0 MHz Unit
Max
Resolution
Number of Bits Resolved by A/D Converter
—
8
—
Bits
Non-Linearity
Maximum Deviation from the Ideal A/D Transfer
Characteristics
——
± 1
LSB
Zero Error
Difference Between the Output of an Ideal and
an Actual for Zero Input Voltage
——
± 1
LSB
Full Scale Error
Difference Between the Output of an Ideal and
an Actual A/D for Full-Scale Input Voltage
——
± 1
LSB
Total Unadjusted
Error
Maximum Sum of Non-Linearity, Zero Error, and
Full-Scale Error
——
± 1/2
± 1 1/2 ± 1 1/2 LSB
Quantization
Error
Uncertainty Because of Converter Resolution
—
± 1/2
LSB
Absolute
Accuracy
Difference Between the Actual Input Voltage and
the Full-Scale Weighted Equivalent of the Binary
Output Code, All Error Sources Included
——
± 1
± 2
LSB
Conversion
Range
Analog Input Voltage Range
VRL
—VRH
VRH
V
VRH
Maximum Analog Reference Voltage
(Note 2)
VRL
—VDD +
0.1
VDD +
0.1
VDD +
0.1
V
VRL
Minimum Analog Reference Voltage
(Note 2)
VSS –0.1
—
VRH
V
R
Minimum Difference between VRH and VRL
(Note 2)
3
—
———
V
Conversion
Time
Total Time to Perform a Single
Analog-to-Digital Conversion:
E Clock
Internal RC Oscillator
—
32
—
tcyc + 32
—
tcyc + 32
—
tcyc + 32
tcyc
s
Monotonicity
Conversion Result Never Decreases with an
Increase in Input Voltage and has no Missing
Codes
Guaranteed
Zero Input
Reading
Conversion Result when Vin = VRL
00
—
Hex
Full Scale
Reading
Conversion Result when Vin = VRH
—
FF
Hex
Sample
Acquisition Time
Analog Input Acquisition Sampling Time:
E Clock
Internal RC Oscillator
—
12
—
12
—
12
—
12
tcyc
s
Sample/Hold
Capacitance
Input Capacitance during Sample PE[7:0]
—
20 (Typ)
—
pF
Input Leakage
Input Leakage on A/D Pins
PE[7:0]
VRL, VRH
—
400
1.0
400
1.0
400
1.0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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