參數(shù)資料
型號： K1B6416B6C
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory
中文描述： 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲器
文件頁數(shù)： 6/46頁
文件大小： 768K
代理商： K1B6416B6C
Revision 1.0
January 2005
K1B6416B6C
- 6 -
U
t
RAM
LIST of FIGURES
Figure 1. Pin Description
Figure 2. Functional Block Diagram
Figure 3. Power Up Timing
Figure 4. Standby Mode State Machine
Figure 5. Mode Register Setting Timing
Figure 6. Asynchronous 4-Page Read
Figure 7. Asynchronous Write
Figure 8. Synchronous Burst Read
Figure 9. Synchronous Burst Write
Figure 10. Latency Configuration(Read)
Figure 11. WAIT Control and Read/Write Latency Control
Figure 13. PAR Mode Execution and Exit
Figure 14. AC Output Load Circuit(Asynchronous)
Figure 15. Timing Waveform of Asynchronous Read Cycle
Figure 16. Timing Waveform of Page Read Cycle
Figure 17. Timing Waveform of Write Cycle(Asynchronous, WE Controlled)
Figure 18. Timing Waveform of Write Cycle(Asynchronous, UB & LB Controlled)
Figure 19. Timing Waveform of Write Cycle(Asynchronous, Address Latch Type, WE Controlled)
Figure 20. Timing Waveform of Write Cycle(Asynchronous, Address Latch Type, UB & LB Controlled)
Figure 21. Timing Waveform of Write Cycle(Asynchronous, Low ADV Type, WE Controlled)
Figure 22. Timing Waveform of Write Cycle(Asynchronous, Low ADV Type, UB & LB Controlled)
Figure 23. Timing Waveform of Multiple Write Cycle(Asynchronous, Low ADV Type, WE Controlled )
Figure 24. AC Output Load Circuit(Synchronous)
Figure 25. Timing Waveform of Basic Burst Operation
Figure 26. Timing Waveform of Burst Read Cycle(CS Toggling Consecutive Burst Read)
Figure 27. Timing Waveform of Burst Read Cycle(CS Low Holding Consecutive Burst Read)
Figure 28. Timing Waveform of Burst Read Cycle(Last Data Sustaining)
Figure 29. Timing Waveform of Burst Write Cycle(CS Toggling Consecutive Burst Write)
Figure 30. Timing Waveform of Burst Write Cycle(CS Low Holding Consecutive Burst Write)
Figure 31. Timing Waveform of Burst Read Stop by CS
Figure 32. Timing Waveform of Burst Write Stop by CS
Figure 33. Timing Waveform of Burst Read Suspend Cycle
Figure 34. Synch. Burst Read to Asynch. Write(Address Latch Type) Timing Waveform
Figure 35. Synch. Burst Read to Asynch. Write(Low ADV Type) Timing Waveform
Figure 36. Asynch. Write(Address Latch Type) to Synch. Burst Read Timing Waveform
Figure 37. Asynch. Write(Low ADV Type) to Synch. Burst Read Timing Waveform
Figure 38. Synch. Burst Read to Synch. Burst Write Timing Waveform
Figure 39. Synch. Burst Write to Synch. Burst Read Timing Waveform
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