參數(shù)資料
型號: K1B6416B6C
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory
中文描述: 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲器
文件頁數(shù): 20/46頁
文件大?。?/td> 768K
代理商: K1B6416B6C
Revision 1.0
January 2005
K1B6416B6C
- 20 -
U
t
RAM
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level: 0.2 to V
CC
-0.2V
Input rising and falling time: 3ns
Input and output reference voltage: 0.5 x V
CC
Output load: C
L
=30pF
Table 18. ASYNCHRONOUS AC CHARACTERISTICS
(V
CC
=1.7~2.0V, T
A
=-40 to 85
°
C)
1. t
WP
(min)=70ns for continuous write operation over 50 times.
Parameter List
Symbol
Speed
Units
Min
Max
Common
CS High Pulse Width
Read Cycle Time
Page Read Cycle Time
t
CSHP(A)
t
RC
t
PC
10
70
25
-
-
-
ns
ns
ns
Async.
(Page)
Read
Address Access Time
Page Access Time
Chip Select to Output
Output Enable to Valid Output
UB, LB Access Time
Chip Select to Low-Z Output
UB, LB Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
UB, LB Disable to High-Z Output
Output Disable to High-Z Output
Output Hold
Write Cycle Time
Chip Select to End of Write
ADV Minimum Low Pulse Width
Address Set-up Time to Beginning of Write
Address Set-up Time to ADV Falling
Address Hold Time from ADV Rising
t
AA
t
PA
t
CO
t
OE
t
BA
t
LZ
t
BLZ
t
OLZ
t
CHZ
t
BHZ
t
OHZ
t
OH
t
WC
t
CW
t
ADV
t
AS
t
AS(A)
t
AH(A)
-
-
-
-
-
70
20
70
35
35
-
-
-
12
12
12
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
5
5
0
0
0
3
70
60
7
0
0
7
Async.
Write
CS Setup Time to ADV Rising
Address Valid to End of Write
UB, LB Valid to End of Write
Write Pulse Width
WE High Pulse Width
Write Recovery Time
WE Low to Read Latency
Data to Write Time Overlap
Data Hold from Write Time
t
CSS(A)
t
AW
t
BW
t
WP
t
WHP
t
WR
t
WLRL
t
DW
t
DH
10
60
60
-
-
-
-
ns
ns
ns
ns
-
ns
55
1)
5 ns
0
1
30
0
Latency-1 clock
-
-
-
-
clock
ns
ns
Figure 14. AC Output Load Circuit
Vtt=0.5 x VCC
50
Dout
30pF
Z0=50
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