參數(shù)資料
型號(hào)： K1B6416B6C
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory
中文描述： 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲(chǔ)器
文件頁(yè)數(shù)： 32/46頁(yè)
文件大?。?/td> 768K
代理商： K1B6416B6C
Revision 1.0
January 2005
K1B6416B6C
- 32 -
U
t
RAM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
ADV
Address
CS
LB, UB
Data out
OE
CLK
DQ0
DQ1
DQ2
DQ3
Undefined
t
CD
Valid
Latency 5
t
HZ
Valid
t
ADVS
t
ADVH
t
AS(B)
t
AH(B)
t
CSS(B)
T
t
OH
Don’t Care
Fig.26 TIMING WAVEFORM OF BURST READ CYCLE(1)
[Latency=5,Burst Length=4,WP=Low enable]
(WE=V
IH
, MRS=V
IH
)
- CS Toggling Consecutive Burst Read
SYNCHRONOUS BURST READ TIMING WAVEFORM
(SYNCHRONOUS BURST READ CYCLE - CS Toggling Consecutive Burst Read)
1. The new burst operation can be issued only after the previous burst operation is finished. For the new burst operation, tBEADV
should be met.
2. /WAIT Low(tWL or tAWL) : Data not available(driven by CS low going edge or ADV low going edge)
/WAIT High(tWH) : Data available(driven by Latency-1 clock)
/WAIT High-Z(tWZ) : Data don’t care(driven by CS high going edge)
3. Multiple clock risings are allowed during low ADV period. The burst operation starts from the first clock rising.
4. Burst Cycle Time(tBC) should not be over 2.5
μ
s.
WAIT
t
BLZ
t
BEL
t
OEL
t
OLZ
High-Z
0
t
WH
t
WL
t
WZ
t
CHZ
t
OHZ
t
BHZ
t
CSHP
t
WL
t
WH
t
BEADV
t
BC
～
Table 30. BURST READ AC CHARACTERISTICS
(CS Toggling Consecutive Burst)
Symbol
Speed
Units
Symbol
Speed
Units
Min
Max
Min
Max
t
CSHP
t
BEL
t
OEL
t
BLZ
t
OLZ
t
HZ
t
CHZ
5
1
1
5
5
-
-
-
-
-
-
-
ns
t
OHZ
t
BHZ
t
CD
t
OH
t
WL
t
WH
t
WZ
-
-
-
3
-
-
-
12
12
10
-
10
12
12
ns
ns
ns
ns
ns
ns
ns
clock
clock
ns
ns
ns
ns
12
12
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