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參數(shù)資料
| 型號(hào)： | K1B6416B6C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| 中文描述： | 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 34/46頁(yè) |
| 文件大小： | 768K |
| 代理商： | K1B6416B6C |
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Revision 1.0
January 2005
K1B6416B6C
- 34 -
U
t
RAM
Fig.28 TIMING WAVEFORM OF BURST READ CYCLE(3)
[Latency=5,Burst Length=4,WP=Low enable]
(WE=V
IH
, MRS=V
IH
)
- Last Data Sustaining
ADV
Address
CS
LB, UB
Data out
OE
CLK
DQ0
DQ1
DQ2
Undefined
t
CD
Valid
Latency 5
t
ADVS
t
ADVH
t
AS(B)
t
AH(B)
t
CSS(B)
T
t
OH
Don’t Care
DQ3
(SYNCHRONOUS BURST READ CYCLE - Last Data Sustaining)
1. /WAIT Low(tWL or tAWL) : Data not available(driven by CS low going edge or ADV low going edge)
/WAIT High(tWH) : Data available(driven by Latency-1 clock)
/WAIT High-Z(tWZ) : Data don’t care(driven by CS high going edge)
2. Multiple clock risings are allowed during low ADV period. The burst operation starts from the first clock rising.
3. Burst Cycle Time(tBC) should not be over 2.5
μ
s.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYNCHRONOUS BURST READ TIMING WAVEFORM
t
BEL
t
OEL
t
BLZ
t
OLZ
WAIT
High-Z
0
t
WL
t
WH
t
BC
Table 32. BURST READ AC CHARACTERISTICS
(Last Data Sustaining)
Symbol
Speed
Units
Symbol
Speed
Units
Min
Max
Min
Max
t
BEL
t
OEL
t
BLZ
t
OLZ
1
1
5
5
-
-
-
-
clock
clock
ns
ns
t
CD
t
OH
t
WL
t
WH
-
3
-
-
10
-
10
12
ns
ns
ns
ns
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