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參數(shù)資料
| 型號： | K1B6416B6C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| 中文描述： | 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲器 |
| 文件頁數(shù)： | 28/46頁 |
| 文件大?。?/td> | 768K |
| 代理商： | K1B6416B6C |
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Revision 1.0
January 2005
K1B6416B6C
- 28 -
U
t
RAM
(LOW ADV TYPE WRITE CYCLE - UB & LB Controlled)
1. A wri
t
e occurs during the overlap(t
WP
) of low CS and low WE. A write begins when CS goes low and WE goes low with asserting UB
or LB for single byte operation or simultaneously asserting UB and LB for double byte operation. A write ends at the earliest transition
when CS goes high or WE goes high. The
t
WP
is measured from the beginning of write to the end of write.
2.
t
CW
is measured from the CS going low to the end of write.
3. t
AS
is measured from the address valid to the beginning of write.
4.
t
WR
is measured from the end of write to the address change.
t
WR
is applied in case a write ends with CS or WE going high.
5. Clock input does not have any affect to the write operation if the parameter tWLRL is met.
Fig.22 TIMING WAVEFORM OF WRITE CYCLE(Low ADV Type)
(MRS=V
IH,
OE=V
IH
, WAIT=High-Z, UB & LB Controlled)
Address
Data Valid
UB, LB
WE
Data in
t
WC
t
CW
t
BW
t
WP
t
DH
t
DW
t
WR
t
AW
t
AS
CS
ADV
Data out
High-Z
CLK
Read Latency 5
1
2
3
4
5
6
7
8
9
0
10
11
12
13
14
t
WLRL
High-Z
ASYNCHRONOUS WRITE TIMING WAVEFORM in SYNCHRONOUS MODE
Table 26. ASYNCH. WRITE IN SYNCH. MODE AC CHARACTERISTICS
(Low ADV Type, UB & LB Controlled)
1. t
WP
(min)=70ns for continuous write operation over 50 times.
Symbol
Speed
Units
Symbol
Speed
Units
Min
Max
Min
Max
t
WC
t
CW
t
AW
t
BW
t
WP
70
60
60
60
-
-
-
-
-
ns
ns
ns
ns
ns
t
WLRL
t
AS
t
WR
t
DW
t
DH
1
0
0
-
-
-
-
-
clock
ns
ns
ns
ns
30
0
55
1)
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| K1BAAAAAAA | 制造商:OTTO Engineering Inc 功能描述:SCREW,RED ROCKERON-NONE-OFF,SPST,NO LIGHTS OR LEGENDS |
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