- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376106 > JTS8388B JTS8388B [Updated 9/03. 47 Pages] ADC 8-bit 1 Gsps in die form PDF資料下載
參數(shù)資料
| 型號(hào)： | JTS8388B |
| 英文描述： | JTS8388B [Updated 9/03. 47 Pages] ADC 8-bit 1 Gsps in die form |
| 中文描述： | JTS8388B [更新9 / 03。 47頁] ADC的8位1死GSPS的形式 |
| 文件頁數(shù)： | 35/47頁 |
| 文件大小： | 785K |
| 代理商： | JTS8388B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
35
JTS8388B
2104A–BDC–09/03
Single Ended ECL Clock
Input
In a single-ended configuration enter on the CLK (resp. CLKB) pad, with the inverted
phase clock input pad CLKB (respectively CLK) connected to -1.3 V through the 50
termination resistor.
The in-phase input amplitude is 1 V, centered on a -1.3 V common mode.
Figure 32.
Single-ended Clock Input (ECL)
VCLK common mode = -1.3 V, VCLKB = -1.3 V
Clock Signal Duty Cycle
Adjust
At fast sampling rates, (1 Gsps and above), the device performance (especially the
SNR) can be improved by tuning the clock duty cycle (CLK, CLKB).
In a single-ended configuration, when using a sinewave clock generator, the clock sig-
nal duty cycle can be easily adjusted by simply offsetting the in-phase clock signal using
a biasing tee, (as the out of phase clock input is at ground level).
Figure 33.
Single-ended Clock Input (In-phase Clock Input Common Mode Shifted)
VCLK common mode = -180 mV, VCLKB = 0 V
Note:
1. Do not exceed 10 dBm into the 50
termination resistor for single clock input power
level.
2. For an input CLK signal of 4 dBm into 50
, the typical offset value to achieve a
40/60 clock duty cycle is -180 mV on CLK.
-1.8 V
-0.8 V
t
[V]
VCLK
VCLKB = -1.3 V
[V]
t
VCLK = 180 mV
VCLKB = (0 V)
-0.5 V
40 %
60 %
0.5 V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| JTSX8388B-1V1B | A/D CONVERTER |
| JUCA4532 | Optoelectronic |
| JV1-100V | |
| JV1-12V | |
| JV1-18V | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| JTS8388B-1V1B | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:ADC 8-bit 1 GSPS |
| JTS8388B-1V2B | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:ADC 8-bit 1 GSPS |
| JTS922H-DZD1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAIL TO RAIL HIGH OUTPUT CURRENT DUAL OPERATIONAL AMPLIFIER |
| JTSIY-10-35P | 制造商:Amphenol Corporation 功能描述:CONN MIL-C-27599 CIRC PIN 13 POS SLDR ST PNL MNT 13TERM - Bulk |
| JTSIY-10-98P | 制造商:Amphenol Corporation 功能描述:CONN MIL-C-27599 CIRC PIN 6 POS SLDR ST PNL MNT 6TERM - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。