參數(shù)資料
型號： GC4116
廠商： Electronic Theatre Controls, Inc.
英文描述： MULTI-STANDARD QUAD DUC CHIP
中文描述： 多標(biāo)準(zhǔn)四數(shù)字上芯片
文件頁數(shù)： 57/57頁
文件大?。?/td> 401K
代理商： GC4116
REV 1.0
APRIL 27, 2001
GC4116 REGISTER ASSIGNMENT QUICK REFERENCE GUIDE
Page
Address
Name
7(MSB)
6
5
4
3
2
1
0(LSB)
Suggested
Default
I
O
C
O
N
T
R
O
L
7
16
Channel Input
PARALLEL_D
PARALLEL_C
PARALLEL_B
PARALLEL_A
SFS_POL
SCK_POL
-
PACKED
01
17
Resampler Input
RES_PAR_D
RES_PAR_C
RES_PAR_B
RES_PAR_A
RFS_POL
RCK_POL
SC_MODE
RES_PACKED
03
18
Resampler Out
ROCK_SYNC (See below)
ROFS_POL
ROCK_POL
ROCK_RATE
51
19
Sum IO Mode
SUM_CLEAR
SUM_DELAY
SUM_SCALE
SUM_ROUND
80
20
Serial Controller
SCCK_SYNC (See Below)
SCFS_POL
SCCK_POL
SCCK_RATE
51
21
SC Frame Count
SC_FRAME_CNT
17
22
SC FS Delay A,B
SC_FRAME_DELAY_B
SC_FRAME_DELAY_A
11
23
SC FS Delay C,D
SC_FRAME_DELAY_D
SC_FRAME_DELAY_C
11
24
Output Enables
RREQ_POL
CHREQ_POL
-
SO_EN
SC_EN
REQ_EN
RES_EN
SUM_EN
1F
25
Res Clock Divder
RES_CLK_DIV clock rate = 2*F
CK
/(1+RES_CLK_DIV)
00
R
E
S
A
M
P
L
E
R
8
16
N-Channels
-
RES_SYNC
NF=(NFILTER-1)
NC =(NCHAN-1)
23
17
N-Multiplies
-
NO_SYM_RES
NM=(NMULT-1)
0E
18
Filter Select
FILTER_SEL_3
FILTER_SEL_2
FILTER_SEL_1
FILTER_SEL_0
00
19
Final Shift
-
-
ROUND (12B,16B, 20B,24B)
FINAL_SHIFT
34
20
Channel Map
CHAN_MAP_D
CHAN_MAP_C
CHAN_MAP_B
CHAN_MAP_A
E4
21
Ratio Sync
-
RATIO_SYNC
TEST (must be 0)
70
22
unused
-
00
23
Ratio Map
RATIO_MAP_3
RATIO_MAP_2
RATIO_MAP_1
RATIO_MAP_0
00
9
16-19
Res Ratio 0
RATIO_0, Resampler ratio 0. RATIO = 2
26
(Resampler input sample rate)/(Resampler output sample rate)
04000000
20-23
Res Ratio 1
RATIO_1, Resampler ratio 1.
04000000
24-27
Res Ratio 2
RATIO_2, Resampler ratio 2.
04000000
28-31
Res Ratio 3
RATIO_3, Resampler ratio 3.
04000000
32-63
16-31
Filter Taps
Resampler Coefficients, 8 LSBs in even addresses, 4 MSBs in odd addresses. (Must be loaded in the blocks 16-23 and 24-31)
Sync Circuit
Mode 1
Description
Default Sync Circuit
Mode 1
Description
Default
INT_SYNC
SIA
Interpolation control counter.
Sets timing of CHREQ.
1(SIA) GAIN_SYNC
SIB
A single bit sync selection.
GAIN_SYNC=0 means the
gain is applied immediately.
GAIN_SYNC=1 means the
gain is applied after SIB.
0
COUNTER_
SYNC
SIA
Internal sync counter.
Generates TC sync. Mode 2
is always ONE_SHOT
2 (OS) DIAG_SYNC
SIA
Selects when to start the
diagnostic ramp and to store
the diagnostic checksum.
2 (TC)
OUTPUT_
SYNC
SIA
The output sync (SO)
selection.
2 (TC) FREQ_SYNC
SIB
Selects when new frequency
settings take effect.
3 (on)
ROCK_SYNC
SIA
Syncs the resampler’s serial
output clock. Mode 2 is SIB.
PHASE_SYNC
SIB
Selects when new phase
settings take effect.
3 (on)
SCCK_SYNC
SIA
Syncs the serial controller’s
serial output clock. Mode 2 is
SIB.
NCO_SYNC
SIB
Reset the NCO phase
accumulator
0 (off)
RES_SYNC
Note 1
Syncs the resampler during
initialization
DITHER_
SYNC
SIB
Clears the NCO dither circuit.
0 (off)
RATIO_SYNC
Note 1
Selects when a new
resampler ratio takes effect.
FLUSH _
(A,B,C,D)
SIA
Starts a flush of the channel
1 (SIA)
Note 1: These use a 3 bit sync mode selection where modes 0,1 and 5 are “off”, mode 2 is SIA, mode 3 is SIB, mode 4 is ONE_SHOT,
and modes 6 and 7 are “on”.
GAIN
G
128
--------
----------------------------
65536
N
4
2
SCALE
12
BIG_SHIFT
×
3
+
+
(
)
–
{
}
2
SUM_SCALE
7
–
{
}
=
RES_GAIN
×
NDELAY
32768
(
)
2
(
FINAL_SHIFT
)
=
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