
19992001
GRAYCHIP,INC.
- iv -
APRIL 27, 2001
GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
This document contains preliminary information which may be changed at any time without notice
LIST OF FIGURES
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Figure 17:
GC4116 Block Diagram ........................................................................................................................................................1
Normal Control I/O Timing ....................................................................................................................................................3
Edge Write Control Timing ....................................................................................................................................................3
Serial Input Formats ..............................................................................................................................................................4
The Up-converter Channel ...................................................................................................................................................5
Typical PFIR Specifications ..................................................................................................................................................6
Five Stage CIC Interpolate by N Filter ..................................................................................................................................7
NCO Circuit ...........................................................................................................................................................................8
Example NCO Spurs .............................................................................................................................................................8
NCO Peak Spur Plot .............................................................................................................................................................8
Overall Filter Response ........................................................................................................................................................9
Resampler Channel Block Diagram ....................................................................................................................................11
The Resampler’s Spectral Response .................................................................................................................................12
Resampler Serial Output .....................................................................................................................................................14
160 Pin Plastic Ball Grid Array (PBGA) Package ...............................................................................................................19
Reference Design Without the Resampler ..........................................................................................................................47
Reference Design Using the Resampler .............................................................................................................................48
LIST OF TABLES
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Sync Modes ........................................................................................................................................................................16
Sync Descriptions ...............................................................................................................................................................16
Mask Revisions ...................................................................................................................................................................18
GC4116 Pin Out Locations Top View .................................................................................................................................20
GLOBAL CONTROL REGISTERS .....................................................................................................................................23
Page Assignments ..............................................................................................................................................................29
IO Control Page Registers (Page 5)....................................................................................................................................34
Resampler Control Registers ..............................................................................................................................................38
Resampler Ratio Page ........................................................................................................................................................40
PFIR Coefficient Pages........................................................................................................................................................41
Resampler Coefficient Pages (Single filter mode) ..............................................................................................................42
Absolute Maximum Ratings ................................................................................................................................................43
Recommended Operating Conditions .................................................................................................................................43
Thermal Data ......................................................................................................................................................................43
DC Operating Conditions ....................................................................................................................................................44
AC Characteristics...............................................................................................................................................................45