參數(shù)資料
型號: GC4116
廠商: Electronic Theatre Controls, Inc.
英文描述: MULTI-STANDARD QUAD DUC CHIP
中文描述: 多標(biāo)準(zhǔn)四數(shù)字上芯片
文件頁數(shù): 31/57頁
文件大小: 401K
代理商: GC4116
GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
19992001
GRAYCHIP,INC.
- 26 -
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice
ADDRESS 6:
Counter Byte 0
, suggested default = 0xff
ADDRESS 7:
Counter Byte 1
, suggested default = 0xff
The chip’s internal sync counter counts in cycles of 128(
CNT
+1) clocks. A terminal count signal (TC) is output at the end of
each cycle. The counter can be synchronized to an external sync as specified in the Sync mode Register (See Address 0). If
CNT
is set so that 128(
CNT
+1) is a multiple of twice the interpolation ratio (i.e., a multiple of 16N), then the terminal count of this
counter can be output on the
SO
pin and used to periodically synchronize multiple GC4116 chips.
ADDRESS 8:
Channel-A Sync Modes
, suggested default = 0x5f
ADDRESS 9:
Channel-B Sync Modes
ADDRESS 10:
Channel-C Sync Modes
ADDRESS 11:
Channel-D Sync Modes
Registers 8,9,10 and 11 control the synchronization modes of the four channels. The sync modes described here are unique
to each of the channels. Sync mode 1 is SIB. The sync modes are shown in Table 1 (See Section 3.11).
The NCO_SYNC mode is usually set to be always “off”, unless the user wants to coherently control the phases of multiple
channels. The FREQ_SYNC and PHASE_SYNC modes are typically set to be always “on” so that frequency and phase settings
will take effect immediately as they are written into their control registers (See pages 0 and 1). The DITHER_SYNC is used to
turn on or off the dithering of the NCO phase. To turn off dithering set the DITHER_SYNC to be always “on” so that it remains
initialized to zero. To turn dithering on set the sync to be always “off”. During diagnostics the NCO_SYNC and DITHER_SYNC
should be set to “TC”.
BIT
TYPE
NAME
DESCRIPTION
0-7
R/W
CNT
[0:7]
The LSBs of the counter cycle period
BIT
TYPE
NAME
DESCRIPTION
0-7
R/W
CNT
[8:15]
The 8 MSBs of the counter cycle period
BIT
TYPE
NAME
DESCRIPTION
0,1 LSB
R/W
FREQ_SYNC
The new frequency setting takes affect on this sync
2,3
R/W
PHASE_SYNC
The new phase offset takes affect on this sync
4,5
R/W
NCO_SYNC
The NCO is initialized to the phase setting by this sync
6,7 MSB
R/W
DITHER_SYNC
The dither circuit is initialized by this sync to zero.
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