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參數(shù)資料
| 型號(hào)： | GC4116 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | MULTI-STANDARD QUAD DUC CHIP |
| 中文描述： | 多標(biāo)準(zhǔn)四數(shù)字上芯片 |
| 文件頁數(shù)： | 28/57頁 |
| 文件大?。?/td> | 401K |
| 代理商： | GC4116 |
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GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
19992001
GRAYCHIP,INC.
- 23 -
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice
5.0
CONTROL REGISTERS
The chip is configured and controlled through the use of eight bit control registers. These registers are accessed for reading
or writing using the control bus pins (
CE
,
RD
,
WR
,
A[0:4]
, and
C[0:7]
) described in the previous section. The registers are divided
into 16 global registers and 16 paged registers. Addresses 0-15 are reserved for global registers. Addresses 16-31 are used for
paged registers. Address 15 is the page register which selects which control registers are accessed by addresses 16 through 31.
5.1
GLOBAL REGISTERS
The 16 global control registers are:
Table 5: GLOBAL CONTROL REGISTERS
ADDRESS
NAME
DESCRIPTION
0
Sync Mode
Syncs for interpolation, counter, and output. Also ONE_SHOT control.
1
Interpolation Mode
Real in, SplitIQ, gain sync, no symmetry, and diagnostic.
2
Interpolation Gain
Set CIC gain.
3
Interpolation Byte 0
CIC interpolation count least significant byte.
4
Interpolation Byte 1
CIC interpolation count most significant bye.
5
Reset
Resets for the four channels, resampler, outputs, and global reset.
6
Counter Byte 0
Sync counter least significant byte.
7
Counter Byte 1
Sync counter most significant byte.
8
Chan A sync
Syncs for channel A’s frequency, phase, NCO, and dither.
9
Chan B sync
Syncs for channel B’s frequency, phase, NCO, and dither.
10
Chan C sync
Syncs for channel C’s frequency, phase, NCO, and dither.
11
Chan D sync
Syncs for channel D’s frequency, phase, NCO, and dither.
12
Flush
Flush controls for all four channels.
13
Miscellaneous
Complex out, msb invert, and various test control bits.
14
Status
Status feedback from chip including: ready/missed flags for channel and
resampler, and overflow flags from many places w/in the chip.
15
Page
Page register
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