參數(shù)資料
型號(hào)： FDC37C666GT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
中文描述： 1 Mbps, IDE COMPATIBLE, FLOPPY DISK DRIVE CONTROLLER, PQFP100
封裝： QFP-100
文件頁數(shù)： 78/152頁
文件大小： 621K
代理商： FDC37C666GT
78
SERIAL PORT
(UART)
The
incorporate two full function UARTs. They are
compatible with the NS16450, the 16450 ACE
registers and the NS16550A. The UARTS
perform serial-to-parallel conversion on received
characters and parallel-to-serial conversion on
transmit characters. The data rates are
independently programmable from 115.2K baud
down to 50 baud. The character options are
programmable for 1 start; 1, 1.5 or 2 stop bits;
even, odd, sticky or no parity; and prioritized
interrupts. The UARTS each contain a
programmable baud rate generator that is
capable of dividing the input clock or crystal by
a number from 1 to 65535. The UARTs are also
capable of supporting the MIDI data rate. Refer
to the FDC37C665GT Configuration Registers
and the FDC37C666GT Hardware
FDC37C665GT
and
FDC37C666GT
Configuration description for information on
disabling, power down and changing the base
address of the UARTS. The interrupt from a
UART is enabled by programming OUT2 of that
UART to a logic "1". OUT2 being a logic "0"
disables that UART's interrupt.
REGISTER DESCRIPTION
Addressing of the accessible registers of the
Serial Port is shown below. The base
addresses of the serial ports are defined by the
configuration
registers
section). The Serial Port registers are located at
sequentially increasing addresses above these
base addresses. The FDC37C665GT/666GT
contains two serial ports, each of which contain
a register set as described below.
(see
Configuration
Table 34 - Addressing the Serial Port
A1
A0
0
0
0
0
0
1
1
0
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
DLAB*
0
0
0
X
X
X
X
X
X
X
1
1
A2
0
0
0
0
0
0
1
1
1
1
0
0
REGISTER NAME
Receive Buffer (read)
Transmit Buffer (write)
Interrupt Enable (read/write)
Interrupt Identification (read)
FIFO Control (write)
Line Control (read/write)
Modem Control (read/write)
Line Status (read/write)
Modem Status (read/write)
Scratchpad (read/write)
Divisor LSB (read/write)
Divisor MSB (read/write
*NOTE: DLAB is Bit 7 of the Line Control Register
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