參數(shù)資料
型號(hào)： FDC37C666GT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
中文描述： 1 Mbps, IDE COMPATIBLE, FLOPPY DISK DRIVE CONTROLLER, PQFP100
封裝： QFP-100
文件頁數(shù)： 74/152頁
文件大小： 621K
代理商： FDC37C666GT
74
types, nor having to change write pre-
compensation values.
When both GAP and WGATE bits of the
PERPENDICULAR MODE COMMAND are both
programmed to "0" (Conventional mode), then
D0, D1, D2, D3, and D4 can be programmed
independently to "1" for that drive to be set
automatically to Perpendicular mode. In this
mode the following set of conditions also apply:
1. The GAP2 written to a perpendicular drive
during a write operation will depend upon the
programmed data rate.
2. The write pre-compensation given to a
perpendicular mode drive will be 0ns.
3. For
conventional mode drives any data written
will be at the currently programmed write
pre-compensation.
D0-D3
programmed
to
"0"
for
Note: Bits D0-D3 can only be overwritten when
OW is programmed as a "1".
If either GAP or WGATE is a "1" then
D0-D3 are ignored.
Software and hardware resets have the
following effect on the PERPENDICULAR
MODE COMMAND:
1. "Software" resets (via the DOR or DSR
registers) will only clear GAP and WGATE
bits to "0". D0-D3 are unaffected and retain
their previous value.
2. "Hardware" resets will clear all bits ( GAP,
WGATE and D0-D3) to "0", i.e all
conventional mode.
Table 32 - Effects of WGATE and GAP Bits
WGATE
GAP
MODE
LENGTH OF
GAP2
FORMAT
FIELD
PORTION OF
GAP 2
WRITTEN BY
WRITE DATA
OPERATION
0 Bytes
19 Bytes
0
0
1
1
0
1
0
1
Conventional
Perpendicular
(500 Kbps)
Reserved
(Conventional)
Perpendicular
(1 Mbps)
22 Bytes
22 Bytes
22 Bytes
41 Bytes
0 Bytes
38 Bytes
LOCK
In order to protect systems with long DMA
latencies against older application software that
can disable the FIFO the LOCK Command has
been added. This command should only be
used by the FDC routines, and application
software should refrain from using it. If an
application calls for the FIFO to be disabled
then the CONFIGURE command should be
used.
The LOCK command defines whether the
EFIFO, FIFOTHR, and PRETRK parameters of
the CONFIGURE command can be RESET by
the DOR and DSR registers. When the LOCK
bit is set to logic "1" all subsequent "software
RESETS by the DOR and DSR registers will not
change the previously set parameters to their
default values. All "hardware" RESET from the
RESET pin will set the LOCK bit to logic "0" and
return the EFIFO, FIFOTHR, and PRETRK to
their default values. A status byte is returned
immediately after issuing a a LOCK command.
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