參數(shù)資料
型號： FDC37C666GT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 存儲控制器/管理單元
英文描述： High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
中文描述： 1 Mbps, IDE COMPATIBLE, FLOPPY DISK DRIVE CONTROLLER, PQFP100
封裝： QFP-100
文件頁數(shù)： 15/152頁
文件大小： 621K
代理商： FDC37C666GT
15
DESCRIPTION OF PIN FUNCTIONS
BUFFER
TYPE
PE
I
PIN NO.
60
NAME
SYMBOL
DESCRIPTION
Paper End
Another status output from the printer, a
high indicating that the printer is out of
paper. Bit 5 of the Printer Status Register
reads the PE input. Refer to Parallel Port
description for use of this pin in ECP and
EPP mode.
This high active output from the printer
indicates that it has power on. Bit 4 of the
Printer Status Register reads the SLCT
input. Refer to Parallel Port description for
use of this pin in ECP and EPP mode.
A low on this input from the printer indicates
that there is a error condition at the printer.
Bit 3 of the Printer Status register reads the
nERR input. Refer to Parallel Port
description for use of this pin in ECP and
EPP mode.
The bi-directional parallel data bus is used
to transfer information between CPU and
peripherals.
In EPP mode, this pin is pulled low to
extend the read/write command. This pin
has an internal pull-up.
59
Printer Selected
Status
SLCT
I
75
nError
nERR
I
71-68
66-63
Port Data
PD0-PD7
I/OP24
100
IOCHRDY
IOCHRDY
OD24P
IDE
O8
23
nIDE Low Byte
Enable
nIDEENLO
S1CF1
I
This active low signal is used in both the XT
and AT mode. In the AT mode, this pin is
active when the IDE is enabled and the I/O
address is accessing 1F0H-1F7H and
3F6H-3F7H in primary address mode or
170H-177H and 376H,377H in secondary
address mode. In the XT mode, this signal
is active for accessing 320H-323H, 8 bit
programmed I/O or DMA.
FDC37C666GT (Adapter Mode): Primary
Serial Configuration 1. Read and latched
during reset active to select the address of
the Secondary Serial Port.
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