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| 型號(hào)： | EVAL-ADUC7036QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 96/132頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7036 |
| 設(shè)計(jì)資源： | EVAL-ADUC7036 Schematic & Brd Outline EVAL ADUC7036 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 主要目的： | 電源管理，電池監(jiān)控器 |
| 嵌入式： | 是，MCU，16/32 位 |
| 已用 IC / 零件： | ADuC7036 |
| 已供物品： | 板，線纜，文檔，仿真器，電源，軟件 |
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ADuC7036
Rev. C | Page 66 of 132
LOW POWER CLOCK CALIBRATION
The low power 131 kHz oscillator can be calibrated using either
the precision 131 kHz oscillator or an external 32.768 kHz watch
crystal. Two dedicated calibration counters and an oscillator
trim register are used to implement this feature.
The first counter (Counter 0) is nine bits wide and is clocked by
an accurate clock oscillator, either the precision oscillator or an
external watch crystal. The second counter (Counter 1) is 10 bits
wide and is clocked by the low power oscillator, either directly
at 131 kHz or through a divide-by-4 block generating 32.768 kHz.
The source for each calibration counter should be of the same
frequency. The trim register (OSC0TRM) is an 8-bit-wide register,
the lower four bits of which are user-accessible trim bits. Increasing
the value in OSC0TRM decreases the frequency of the low power
oscillator. Conversely, decreasing the value in OSC0TRM increases
the frequency. Based on a nominal frequency of 131 kHz, the
typical trim range is between 127 kHz and 135 kHz.
The clock calibration mode is configured and controlled by the
following MMRs:
OSC0CON: control bits for calibration.
OSC0STA: calibration status register.
OSC0VAL0: 9-bit counter, Counter 0.
OSC0VAL1: 10-bit counter, Counter 1.
OSC0TRM: oscillator trim register.
A calibration routine flowchart is shown in Figure 31. User code
configures and enables the calibration sequence using OSC0CON.
When the OSC0VAL0 precision power oscillator calibration
counter reaches 0x1FF, both counters are disabled. User code
then reads back the value of the low power oscillator calibration
counter. There are three possible scenarios:
OSC0VAL0 = OSC0VAL1. No further action is required.
OSC0VAL0 > OSC0VAL1. The low power oscillator is
running slow. OSC0TRM must be decreased.
OSC0VAL0 < OSC0VAL1. The low power oscillator is
running fast. OSC0TRM must be increased.
When the value in OSC0TRM has been changed, the routine
should be run again, and the new frequency should be checked.
Using the internal precision 131 kHz oscillator requires approx-
imately 4 ms to execute the calibration routine. If the external
32.768 kHz crystal is used, the time increases to 16 ms.
Prior to the start of the clock calibration routine, the user must
switch to either the precision 131 kHz oscillator or the external
32.768 kHz watch crystal to serve as the PLL clock source. If this
is not done, the PLL may lose lock each time OSC0TRM is
modified, thereby increasing the time required to calibrate the
low power oscillator.
BEGIN
CALIBRATION
ROUTINE
WHILE
OSC0STA[0] = 1
INCREASE
OSC0TRM
DECREASE
OSC0TRM
OSC0VAL0 < OSC0VAL1
OSC0VAL0 > OSC0VAL1
END
CALIBRATION
ROUTINE
IS ERROR WITHIN
DESIRED LEVEL?
OSC0VAL0 = OSC0VAL1
NO
YES
07
47
4-
0
30
Figure 31. OSC0TRM Calibration Routine
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