參數(shù)資料
型號(hào)： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 53/132頁
文件大小： 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計(jì)資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 27 of 132
Command Sequence for Executing a Mass Erase
Given the significance of the mass erase command, the following
specific code sequence must be executed to initiate this
operation:
Set Bit 3 in FEExMOD.
Write 0xFFC3 in FEExADR.
Write 0x3CFF in FEExDAT.
Run the mass erase command (Code 0x06) in FEExCON.
This sequence is illustrated by the following example:
Int a = FEExSTA;
// Ensure FEExSTA is
cleared
FEExMOD = 0x08
FEExADR = 0xFFC3
FEExDAT = 0x3CFF
FEExCON = 0x06;
// Mass erase command
while (FEExSTA & 0x04){} //Wait for command
to finish
It should be noted that to run the mass erase command via
FEE0CON, the write protection on the lower 64 kB must be
disabled. That is, FEE1HID/FEE1PRO are set to 0xFFFFFFFF.
This setting can be accomplished by first removing the protec-
tion or by erasing the lower 64 kB.
FEE0STA and FEE1STA Registers
Name: FEE0STA and FEE1STA
Address: 0xFFFF0E00 and 0xFFFF0E80
Default Value: 0x20
Access: Read only
Function: These 8-bit, read only registers can be read by user
code, and they reflect the current status of the Flash/EE
memory controllers.
Table 14. FEE0STA and FEE1STA MMR Bit Designations
Bit
7 to 4
Not used. These bits are not used and always read as 0.
3
Flash/EE interrupt status bit.
Set automatically when an interrupt occurs, that is,
when a command is complete and the Flash/EE
interrupt enable bit in the FEExMOD register is set.
Cleared automatically when the FEExSTA register is read
by user code.
2
Flash/EE controller busy.
Set automatically when the Flash/EE controller is busy.
Cleared automatically when the controller is not busy.
1
Command fail.
Set automatically when a command written to FEExCON
completes unsuccessfully.
Cleared automatically when the FEExSTA register is read
by user code.
0
Command successful.
Set automatically by the MCU when a command is
completed successfully.
Cleared automatically when the FEE0STA register is read
by user code.
1 The x represents 0 or 1, designating Flash/EE Block 0 or Flash/EE Block 1.
FEE0ADR and FEE1ADR Registers
Name: FEE0ADR and FEE1ADR
Address: 0xFFFF0E10 and 0xFFFF0E90
Default Value: 0x0000 (FEE1ADR). For FEE0ADR, see the
Access: Read/write access
Function: These 16-bit registers dictate the address acted upon
when a Flash/EE command is executed via FEExCON.
相關(guān)PDF資料
PDF描述
EVB90308 DEMO KIT MLX90308 SENS INTERFACE
MLG0603S4N7S INDUCTOR MULTILAYER 4.7NH 0201
KSZ8041TL-EVAL BOARD EVALUATION KSZ8041TL
EEU-FR1J180 CAP ALUM 18UF 63V 20% RADIAL
MLG0603S3N6S INDUCTOR MULTILAYER 3.6NH 0201
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADUC7039QSPZ 功能描述:BOARD EVAL FOR ADUC7039 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
EVAL-ADUC7060QSPZ 功能描述:KIT DEV QUICK START ADUC7060 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
EVAL-ADUC7060QSPZU1 制造商:Analog Devices 功能描述:
EVALADUC7060QSPZU2 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits)
EVAL-ADUC7061MKZ 功能描述:開發(fā)板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*