參數(shù)資料
型號(hào)： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 118/132頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計(jì)資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 86 of 132
GPIO Port0 Control Register
Name: GP0CON
Address: 0xFFFF0D00
Default Value: 0x11100000
Access: Read/write
Function: This 32-bit MMR selects the pin function for each Port0 pin.
Table 59. GP0CON MMR Bit Designations
Bit
Description
31 to 29
Reserved. These bits are reserved and should be written as 0 by user code.
28
Reserved. This bit is reserved and should be written as 1 by user code.
27 to 25
Reserved. These bits are reserved and should be written as 0 by user code.
24
Internal P0.6 enable bit. This bit must be set to 1 by user software to enable the high voltage serial interface before
using the HVCON and HVDAT registered high voltage interface.
23 to 21
Reserved. These bits are reserved and should be written as 0 by user code.
20
Internal P0.5 enable bit. This bit must be set to 1 by user software to enable the high voltage serial interface before
using the HVCON and HVDAT registered high voltage interface.
19 to 17
Reserved. These bits are reserved and should be written as 0 by user code.
16
GPIO_4 function select bit.
Set to 1 by user code to configure the GPIO_4 pin as ECLK, enabling a 2.56 MHz clock output on this pin.
Cleared by user code to 0 to configure the GPIO_4 pin as a general-purpose I/O (GPIO) pin.
15 to 13
Reserved. These bits are reserved and should be written as 0 by user code.
12
GPIO_3 function select bit.
Set to 1 by user code to configure the GPIO_3 pin as MOSI, master output, and slave input data for the SPI port.
Cleared by user code to 0 to configure the GPIO_3 pin as a general-purpose I/O (GPIO) pin.
11 to 9
Reserved. These bits are reserved and should be written as 0 by user code.
8
GPIO_2 function select bit.
Set to 1 by user code to configure the GPIO_2 pin as MISO, master input and slave output data for the SPI port.
Cleared by user code to 0 to configure the GPIO_2 pin as a general-purpose I/O (GPIO) pin.
7 to 5
Reserved. These bits are reserved and should be written as 0 by user code.
4
GPIO_1 function select bit.
Set to 1 by user code to configure the GPIO_1 pin as SCLK, serial clock I/O for the SPI port.
Cleared by user code to 0 to configure the GPIO_1 pin as a general-purpose I/O (GPIO) pin.
3 to 1
Reserved. These bits are reserved and should be written as 0 by user code.
0
GPIO_0 function select bit.
Set to 1 by user code to configure the GPIO_0 pin as SS, serial clock I/O for the SPI port.
Cleared by user code to 0 to configure the GPIO_0 pin as a general-purpose I/O (GPIO) pin.
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