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| 型號： | EVAL-ADUC7036QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 105/132頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7036 |
| 設(shè)計(jì)資源： | EVAL-ADUC7036 Schematic & Brd Outline EVAL ADUC7036 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 主要目的： | 電源管理，電池監(jiān)控器 |
| 嵌入式： | 是，MCU，16/32 位 |
| 已用 IC / 零件： | ADuC7036 |
| 已供物品： | 板，線纜，文檔，仿真器，電源，軟件 |
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ADuC7036
Rev. C | Page 74 of 132
TIMER0—LIFETIME TIMER
Timer0 is a general-purpose, 48-bit up counter or a 16-bit up/down
counter timer with a programmable prescaler. Timer0 can be
clocked from either the core clock or the low power 32.768 kHz
oscillator with a prescaler of 1, 16, 256, or 32,768. When the core
is operating at 20.48 MHz with a prescaler of 1, a minimum reso-
lution of 48.83 ns results.
In 48-bit mode, Timer0 counts up from 0. The current counter
value can be read from T0VAL0 and T0VAL1.
In 16-bit mode, Timer0 can count up or down. A 16-bit value
can be written to T0LD to load into the counter. The current
counter value is read from T0VAL0. Timer0 has a capture reg-
ister (T0CAP) that is triggered by a selected IRQ source initial
assertion. When the capture register is triggered, the current
timer value is copied to T0CAP, and the timer continues running.
This feature can be used to determine the assertion of an event
with more accuracy than would be provided by servicing an
interrupt alone.
Timer0 reloads the value from T0LD when Timer0 overflows.
The Timer0 interface consists of six MMRS: T0LD, T0CAP,
T0VAL0, T0VAL1, T0CLRI, and T0CON. T0LD is a 16-bit
register holding the 16-bit value that is loaded into the counter.
T0LD is available only in 16-bit mode. T0CAP is a 16-bit
register that holds the 16-bit value captured by an enabled
IRQ event. T0CAP is available only in 16-bit mode. T0VAL0
and T0VAL1 are 16-bit and 32-bit registers that hold the 16 LSBs
and 32 MSBs, respectively. T0VAL0 and T0VAL1 are read only
registers. In 16-bit mode, 16-bit T0VAL0 is used. In 48-bit
mode, both 16-bit T0VAL0 and 32-bit T0VAL1 are used.
T0CLRI is an 8-bit register. Writing any value to this register
clears the interrupt. T0CLRI is available only in 16-bit mode.
T0CON is a configuration MMR and is described in Table 53.
Timer0 Load Register
Name: T0LD
Address: 0xFFFF0300
Default Value: 0x0000
Access: Read/write
Function: T0LD0 is the 16-bit register holding the 16-bit value
that is loaded into the counter. This register is available only in
16-bit mode.
Timer0 Clear Register
Name: T0CLRI
Address: 0xFFFF0310
Access: Write only
Function: This 8-bit, write only MMR is written (with any
value) by user code to clear the interrupt.
Timer0 Value Registers
Name: T0VAL0, T0VAL1
Address: 0xFFFF0304, 0xFFFF0308
Default Value: 0x0000, 0x00000000
Access: Read only
Function: T0VAL0 and T0VAL1 are 16-bit and 32-bit registers that
hold the 16 LSBs and 32 MSBs, respectively. T0VAL0 and T0VAL1
are read only registers. In 16-bit mode, 16-bit T0VAL0 is used.
In 48-bit mode, both 16-bit T0VAL0 and 32-bit T0VAL1 are used.
Timer0 Capture Register
Name: T0CAP
Address: 0xFFFF0314
Default Value: 0x0000
Access: Read only
Function: This 16-bit register holds the 16-bit value captured by
an enabled IRQ event. This register is available only in 16-bit mode.
TIMER0
VALUE
LOW POWER
32.768kHz OSCILLATOR
PRECISION
32.768kHz OSCILLATOR
EXTERNAL 32.768kHz
WATCH CRYSTAL
CORE
CLOCK FREQUENCY
PRESCALER
1, 16, 256, OR 32,768
TIMER0 IRQ
48-BIT UP COUNTER
16-BIT UP/DOWN COUNTER
16-BIT LOAD
CAPTURE
IRQ[31:0]
074
74
-03
2
Figure 35. Timer0 Block Diagram
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