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| 型號(hào)： | EVAL-ADUC7036QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 46/132頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7036 |
| 設(shè)計(jì)資源： | EVAL-ADUC7036 Schematic & Brd Outline EVAL ADUC7036 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 主要目的： | 電源管理，電池監(jiān)控器 |
| 嵌入式： | 是，MCU，16/32 位 |
| 已用 IC / 零件： | ADuC7036 |
| 已供物品： | 板，線纜，文檔，仿真器，電源，軟件 |
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ADuC7036
Rev. C | Page 20 of 132
THEORY OF OPERATION
The ADuC7036 is a complete system solution for battery moni-
toring in 12 V automotive applications. These devices integrate
all of the required features to precisely and intelligently monitor,
process, and diagnose 12 V battery parameters, including battery
current, voltage, and temperature, over a wide range of operating
conditions.
Minimizing external system components, the device is powered
directly from the 12 V battery. An on-chip, low dropout regula-
tor generates the supply voltage for two integrated, 16-bit, Σ-Δ
ADCs. The ADCs precisely measure battery current, voltage,
and temperature to characterize the state of the health and
charge of the car battery.
A Flash/EE memory-based ARM7 microcontroller (MCU) is
also integrated on chip. It is used to both preprocess the acquired
battery variables and to manage communications from the
ADuC7036 to the main electronic control unit (ECU) via a local
interconnect network (LIN) interface that is integrated on chip.
Both the MCU and the ADC subsystem can be individually
configured to operate in normal or flexible power saving modes
of operation.
In its normal operating mode, the MCU is clocked indirectly
from an on-chip oscillator via the phase-locked loop (PLL) at
a maximum clock rate of 20.48 MHz. In its power saving oper-
ating modes, the MCU can be totally powered down, waking
up only in response to an ADC conversion result ready event, a
digital comparator event, a wake-up timer event, a POR event,
or an external serial communication event.
The ADC can be configured to operate in a normal (full power)
mode of operation, interrupting the MCU after various sample
conversion events. The current channel features two low power
modes—low power and low power plus—generating conversion
results to a lower performance specification.
On-chip factory firmware supports in-circuit Flash/EE repro-
gramming via the LIN or JTAG serial interface ports, and
nonintrusive emulation is also supported via the JTAG interface.
These features are incorporated into a low cost QuickStart
development system supporting the ADuC7036.
The ADuC7036 operates directly from the 12 V battery supply
and is fully specified over a temperature range of 40°C to
+115°C. The ADuC7036 is functional, but with degraded
performance, at temperatures from 115°C to 125°C.
OVERVIEW OF THE ARM7TDMI CORE
The ARM7 core is a 32-bit, reduced instruction set computer
(RISC), developed by ARM Ltd. The ARM7TDMI is a
von Neumann-based architecture, meaning that it uses a single
32-bit bus for instruction and data. The length of the data can be
eight, 16, or 32 bits, and the length of the instruction word is either
16 bits or 32 bits, depending on the mode in which the core is
operating.
The ARM7TDMI is an ARM7 core with four additional features,
as listed in Table 8.
Table 8. ARM7TDMI
Feature
Description
T
Support for the Thumb (16-bit) instruction set
D
Support for debug
M
Enhanced multiplier
I
Includes the EmbeddedICE module to support
embedded system debugging
Thumb Mode (T)
An ARM instruction is 32 bits long. The ARM7TDMI processor
supports a second instruction set compressed into 16 bits, the
Thumb instruction set. Faster code execution from 16-bit
memory and greater code density can be achieved by using the
Thumb instruction set, making the ARM7TDMI core
particularly well-suited for embedded applications.
However, the Thumb mode has three limitations.
Relative to ARM, the Thumb code usually requires more
instructions to perform a task. Therefore, ARM code is
best for maximizing the performance of time-critical code
in most applications.
The Thumb instruction set does not include some
instructions that are needed for exception handling, so
ARM code may be required for exception handling.
When an interrupt occurs, the core vectors to the interrupt
location in memory and executes the code present at that
address. The first command is required to be in ARM code.
Multiplier (M)
The ARM7TDMI instruction set includes an enhanced
multiplier with four extra instructions to perform 32-bit by
32-bit multiplication with a 64-bit result, or 32-bit by 32-bit
multiplication-accumulation (MAC) with a 64-bit result.
EmbeddedICE (I)
The EmbeddedICE module provides integrated on-chip debug
support for the ARM7TDMI. The EmbeddedICE module
contains the breakpoint and watchpoint registers that allow
nonintrusive user code debugging. These registers are con-
trolled through the JTAG test port. When a breakpoint or
watchpoint is encountered, the processor halts and enters the
debug state. Once in a debug state, the processor registers can
be interrogated, as can the Flash/EE, SRAM, and memory
mapped registers.
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