
MOTOROLA
6-22
EXCEPTION PROCESSING
CPU32
REFERENCE MANUAL
6.4.1 Normal Four-Word Stack Frame
This stack frame is created by interrupt, format error, TRAP #n, illegal instruction, A-
line and F-line emulator trap, and privilege violation exceptions. Depending on the ex-
ception type, the program counter value is either the address of the next instruction to
be executed or the address of the instruction that caused the exception (see
Figure
6-3
).
Figure 6-3 Format $0 — Four-Word Stack Frame
6.4.2 Normal Six-Word Stack Frame
This stack frame (see
Figure 6-4
) is created by instruction-related traps, which include
CHK, CHK2, TRAPcc, TRAPV, and divide-by-zero, and by trace exceptions. The fault-
ed instruction program counter value is the address of the instruction that caused the
exception. The next program counter value (the address to which RTE returns) is the
address of the next instruction to be executed.
Figure 6-4 Format $2 — Six-Word Stack Frame
Hardware breakpoints also utilize this format. The faulted instruction program counter
value is the address of the instruction executing when the breakpoint was sensed.
Usually this is the address of the instruction that caused the breakpoint, but, because
released writes can overlap following instructions, the faulted instruction program
counter may point to an instruction following the instruction that caused the breakpoint.
The address to which RTE returns is the address of the next instruction to be executed
6.4.3 BERR Stack Frame
This stack frame is created when a bus cycle fault is detected. The CPU32 BERR
stack frame differs significantly from the equivalent stack frames of other M68000
Family members. The only internal machine state required in the CPU32 stack frame
is the bus controller state at the time of the error, and a single register.
15
0
SP
→
STATUS REGISTER
+$02
PROGRAM COUNTER HIGH
PROGRAM COUNTER LOW
+$06
0
0
0
0
VECTOR OFFSET
15
0
SP
→
STATUS REGISTER
+$02
NEXT INSTRUCTION PROGRAM COUNTER HIGH
NEXT INSTRUCTION PROGRAM COUNTER LOW
+$06
0
0
1
0
VECTOR OFFSET
+$08
FAULTED INSTRUCTION PROGRAM COUNTER HIGH
FAULTED INSTRUCTION PROGRAM COUNTER LOW
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.