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參數(shù)資料
| 型號(hào)： | CDB8952 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CrystalLAN 100BASE-X and 10BASE-T Transceiver |
| 中文描述： | CrystalLAN個(gè)100Base - X和10Base - T的收發(fā)器 |
| 文件頁(yè)數(shù)： | 77/82頁(yè) |
| 文件大小： | 1130K |
| 代理商： | CDB8952 |
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CS8952
CrystalLAN
100BASE-X and 10BASE-T Transceiver
77
REPEATER - REPEATER Mode Select. Input, Pin 16.
This pin controls the operation of the CRS (Carrier Sense) pin as shown below:
At power-up or at reset, the value on this pin is latched into bit 12 of the PCS Sub-Layer Configuration
Register (address 17h). This pin includes a weak internal pull-down (> 20 K
), or the value may be set
by an external 4.7 K
pull-up or pull-down resistor.
SPD10 - 10 Mb/s Speed Indication. Output, Pin 68.
This pin is asserted high when the CS8952 is configured for 10 Mb/s operation. This pin can be used to
drive a low-current LED to indicate 10 Mb/s operation.
SPD100 - 100 Mb/s Speed Indication. Output, Pin 67.
This pin is asserted high when the CS8952 is configured for 100 Mb/s operation. This pin can be used
to drive a low-current LED to indicate 100 Mb/s operation.
TCM - Transmit Clock Mode Initialization. Input, Pin 59.
The logic value on this three-level pin during power-up or reset determines whether TX_CLK is used as
an input or an output, and whether an external 25 MHz clock reference is provided on the CLK25 output
pin.
TEST[1:0] - Factory Test. Input, Pins 24 and 25.
These pins are for factory test only. They include weak internal pull-downs (> 20 K
), and should be tied
directly to VSS for normal operation.
REPEATER pin
high
low
low
DUPLEX mode
don
’
t care
full duplex
half duplex
CRS Indicates
receive activity only
receive activity only
receive or transmit activity
TCM pin
high
floating
low
TX_CLK mode
TX_CLK is input
TX_CLK is input
TX_CLK is output
CLK25 status
CLK25 pin is an output
CLK25 is disabled
CLK25 is disabled
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