- 您現在的位置：買賣IC網 > PDF目錄379830 > CDB8952 (Cirrus Logic, Inc.) CrystalLAN 100BASE-X and 10BASE-T Transceiver PDF資料下載
參數資料
| 型號： | CDB8952 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CrystalLAN 100BASE-X and 10BASE-T Transceiver |
| 中文描述： | CrystalLAN個100Base - X和10Base - T的收發(fā)器 |
| 文件頁數： | 27/82頁 |
| 文件大?。?/td> | 1130K |
| 代理商： | CDB8952 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
27
STATUS Pins
-
COL - Collision indication, valid only for
half duplex modes.
-
CRS - Carrier Sense indication
SERIAL MANAGEMENT Pins
-
MDIO - a bi-directional serial data path
-
MDC - clock for MDIO (16.7 MHz max)
-
MII_IRQ - Interrupt indicating change in
the Interrupt Status Register (address 11h)
RECEIVE DATA Pins
-
RXD[3:0] - Parallel data output path
-
RX_CLK - Recovered clock output
-
RX_DV - Indicates when receive data is
present and valid
-
RX_ER - Indicates presence of error in re-
ceived data
-
RX_EN - Can be used to tri-state receiver
output pins
TRANSMIT DATA Pins
-
TXD[3:0] - Parallel data input path
-
TX_CLK - Transmit clock
-
TX_EN - Indicates when transmit data is
present and valid
-
TX_ER - Request to transmit a 100BASE-
T HALT symbol, ignored for 10BASE-T
operation.
The interface uses TTL signal levels, which are
compatible with devices operating at a nominal
supply voltage of either 5.0 or 3.3 volts. It is capa-
ble of supporting either 10 Mb/s or 100 Mb/s data
rates transparently. That is, all signaling remains
identical at either data rate; only the nominal clock
frequency is changed.
4.1
Data frames transmitted through the MII have the
following format:
MII Frame Structure
Each frame is preceded by an inter-frame gap. The
inter-frame gap is an unspecified time during
which no data activity occurs on the media as indi-
cated by the de-assertion of CRS for the receive
path and TX_EN for the transmit path.
The Preamble consists of seven bytes of 10101010.
The Start of Frame Delimiter consists of a single
byte of 10101011.
Data may be any number of bytes.
The End of Frame Delimiter is conveyed by the de-
assertion of RX_DV and TX_EN for receive and
transmit paths, respectively.
Transmission and/or reception of each byte of data
is done one nibble at a time in the following order:
4.2
The presence of recovered data on the RXD[3:0]
bus is indicated by the assertion of RX_DV.
RX_DVwill remain asserted from the beginning of
thepreamble (or Start ofFrame Delimiterif pream-
ble is not used) to the End of Frame Delimiter.
Once RX_DV is asserted, valid data will be driven
MII Receive Data
Preamble
(7 Bytes)
Start of
Frame
Delimiter
(1 Byte)
Data
End of
Frame
Delimiter
MII
Nibble
Stream
LSB
MSB
D0
D1
D2
D3
D0
MAC’s Serial Bit Stream
First Bit
First
Nibble
Second
Nibble
D1 D2 D3 D4 D5 D6 D7
LSB
MSB
相關PDF資料 |
PDF描述 |
|---|---|
| CDBH38D18 | POWER INDUCTORS |
| CDBM128 | POWER INDUCTORS |
| CDBM73MN | POWER INDUCTORS |
| CDBM7D28 | POWER INDUCTORS |
| CDC112 | 1-Line To 9-Line Differential LVPECL Clock Driver(1線-9線差分 LVPECL時鐘驅動器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CDB8952T | 功能描述:以太網開發(fā)工具 Eval Bd 100BASE-TX/ 10BASE-T Transceiver RoHS:否 制造商:Micrel 產品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| CDB-9PF | 制造商:HRS 制造商全稱:HRS 功能描述:CD CRIMP TYPE CONNECTOR |
| CDB-9SF | 制造商:HRS 制造商全稱:HRS 功能描述:CD CRIMP TYPE CONNECTOR |
| CDBA1100 | 制造商:COMCHIP 制造商全稱:Comchip Technology 功能描述:SMD Schottky Barrier Rectifier |
| CDBA1100-G | 功能描述:肖特基二極管與整流器 SCHOTTKY DIODE 1A, 100V RoHS:否 制造商:Skyworks Solutions, Inc. 產品:Schottky Diodes 峰值反向電壓:2 V 正向連續(xù)電流:50 mA 最大浪涌電流: 配置:Crossover Quad 恢復時間: 正向電壓下降:370 mV 最大反向漏泄電流: 最大功率耗散:75 mW 工作溫度范圍:- 65 C to + 150 C 安裝風格:SMD/SMT 封裝 / 箱體:SOT-143 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。