參數(shù)資料
型號: CDB8952
廠商: Cirrus Logic, Inc.
英文描述: CrystalLAN 100BASE-X and 10BASE-T Transceiver
中文描述: CrystalLAN個100Base - X和10Base - T的收發(fā)器
文件頁數(shù): 52/82頁
文件大小: 1130K
代理商: CDB8952
CS8952
52
CrystalLAN
100BASE-X and 10BASE-T Transceiver
6.15
Descrambler Key Initialization Register - Address 16h
15
Load
14
13
12
11
10
9
8
Reserved
Descrambler Initialization Key
7
6
5
4
3
2
1
0
Descrambler Initialization Key
BIT
15
NAME
TYPE
RESET
DESCRIPTION
Load
Read/Set
0
When this bit is set, the descrambler will be loaded
with the value in the Descrambler Initialization Key
field. When the load is complete, this bit will clear
automatically.
These bits should be read as don
t cares and, when
written, should be written to 0.
This register allows the Descrambler to be loaded
with a user-definable key sequence. A value of 000h
has the effect of bypassing the descrambler function.
14:11 Reserved
Read Only
0000
10:0
Descrambler Initial-
ization Key
Read/Write Reset value is
dependent on the
PHY Address field
of the Self Status
Register (address
19h).
This is valuable for testing purposes to allow a deter-
ministic response to test stimulus without a synchro-
nization delay.
Note:
This field is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
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