參數(shù)資料
型號: CDB8952
廠商: Cirrus Logic, Inc.
英文描述: CrystalLAN 100BASE-X and 10BASE-T Transceiver
中文描述: CrystalLAN個100Base - X和10Base - T的收發(fā)器
文件頁數(shù): 53/82頁
文件大小: 1130K
代理商: CDB8952
CS8952
CrystalLAN
100BASE-X and 10BASE-T Transceiver
53
6.16
PCS Sub-Layer Configuration Register - Address 17h
15
14
13
12
11
10
9
8
NRZI Enable
Time-Out
Select
Time-Out
Disable
Repeater
Mode
LED5 Mode
Unlock Regs
MR Preamble
Enable
Fast Test
7
6
5
4
3
2
1
0
CLK25 Disable Enable LT/100
CIM Disable
Tx Disable
Rx Disable
LED1 Mode
LED4 Mode
Digital Reset
BIT
15
NAME
TYPE
RESET
DESCRIPTION
NRZI Enable
Read/Write 1
When this bit is set, the NRZI encoder and decoder
are enabled. When this bit is clear, NRZI encoding
and decoding are disabled.
When this bit is set, the time-out counter in the
receive descrambler is set to time-out after 2 ms
without IDLES. When clear the counter is set to time-
out after 722
μ
s without IDLES.
When this bit is set, the time-out counter in the
receive descrambler is disabled. When this bit is
clear, the time-out counter is enabled.
This bit defines the mode of the Carrier Sense (CRS)
signal. When this bit is set, CRS is asserted due to
receive activity only. When this bit is clear, CRS is
asserted due to either transmit or receive activity.
This bit defines the mode of Pin LED5. When this bit
is set, pin LED5 indicates the synchronization status
of the 100BASE-TX descrambler. When this bit is
clear, LED5 indicates a collision.
14
Time-Out Select
Read/Write 0
13
Time-Out Disable
Read/Write 0
12
Repeater Mode
Read/Write Reset to the value
on the
REPEATER pin.
11
LED5 Mode
Read/Write 0
Note:
This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
When set, this bit unlocks certain read only control
registers for factory testing. Leave clear for proper
operation.
10
Unlock Regs
Read/Write 0
Note:
This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
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