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參數(shù)資料
| 型號： | CDB8952 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CrystalLAN 100BASE-X and 10BASE-T Transceiver |
| 中文描述： | CrystalLAN個100Base - X和10Base - T的收發(fā)器 |
| 文件頁數(shù)： | 57/82頁 |
| 文件大?。?/td> | 1130K |
| 代理商： | CDB8952 |
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CS8952
CrystalLAN
100BASE-X and 10BASE-T Transceiver
57
8
PMD Loopback
Read/Write 0
When set, the scrambled NRZI transmit data is con-
nected directly to the NRZI receive port on the
descrambler. The loopback includes all of the
100BASE-TX functionality except for the MLT-3
encoding/decoding and the analog line-interface
blocks. When clear, the CS8952 is configured for
normal operation.
Note:
Setting Remote Loopback and PMD Loopback
simultaneously will cause neither loopback mode to
be entered, and should not be done.
When set this bit causes the 7 bytes of MAC pream-
ble to be stripped off of incoming 100 Mb/s frames.
The data received across the MII will begin with the 1
byte Start of Frame Delimiter (SFD).
7
Strip Preamble
Read/Write 0
Note:
This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
This bit changes the behavior of the CRS pin only in
the full-duplex (FDX) mode of operation. When set,
CRS will be asserted for transmit data only. When
clear, CRS will be asserted only for receive data.
This bit controls whether loopback data is transmitted
onto the network. When set, any data transmitted
during PMD or ENDEC loopback mode will NOT be
transmitted onto the network. When clear, data will
be transmitted on the TX+/- pins as well as looped
back onto the MII pins.
When set, this bit causes code errors to be reported
by a value of 5h on RXD[3:0] and the assertion of
RX_ER.
6
Alternate FDX CRS Read/Write 0
5
Loopback Transmit
Disable
Read/Write 1
4
Code Error Report
Select
Read/Write 0
When clear, this bit causes code errors to be
reported by a value of 6h on RXD[3:0] and the asser-
tion of RX_ER.
This bit is superseded by the Code Error Report
Enable bit.
When set, this bit causes premature end errors to be
reported by a value of 4h on RXD[3:0] and the asser-
tion of RX_ER.
3
Premature End
Error Report Select
Read/Write 0
When clear, this bit causes premature end errors to
be reported by a value of 6h on RXD[3:0] and the
assertion of RX_ER.
A premature end error is caused by the detection of
two IDLE symbols in the 100 Mb/s receive data
stream prior to the End of Stream Delimiter.
BIT
NAME
TYPE
RESET
DESCRIPTION
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| CDB8952T | 功能描述:以太網(wǎng)開發(fā)工具 Eval Bd 100BASE-TX/ 10BASE-T Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
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| CDBA1100-G | 功能描述:肖特基二極管與整流器 SCHOTTKY DIODE 1A, 100V RoHS:否 制造商:Skyworks Solutions, Inc. 產(chǎn)品:Schottky Diodes 峰值反向電壓:2 V 正向連續(xù)電流:50 mA 最大浪涌電流: 配置:Crossover Quad 恢復(fù)時間: 正向電壓下降:370 mV 最大反向漏泄電流: 最大功率耗散:75 mW 工作溫度范圍:- 65 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-143 封裝:Reel |
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