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參數(shù)資料
| 型號： | CDB8952 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CrystalLAN 100BASE-X and 10BASE-T Transceiver |
| 中文描述： | CrystalLAN個100Base - X和10Base - T的收發(fā)器 |
| 文件頁數(shù)： | 19/82頁 |
| 文件大?。?/td> | 1130K |
| 代理商： | CDB8952 |
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CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
19
2. INTRODUCTION
TheCS8952isacompletephysical-layertransceiv-
er for 100BASE-TX and 10BASE-T applications.
Additionally, the CS8952 can be used with an ex-
ternal optical module for 100BASE-FX.
2.1
The highly integrated mixed-signal design of the
CS8952 eliminates theneed for external analog cir-
cuitry such as external transmit or receive filters.
TheCS8952 builds uponCirrus Logic’s experience
in pioneering the high-volume manufacturing of
10BASE-T integrated circuits with “true” internal
filters. The CS8952, CS8920, CS8904, and
CS8900 include fifth-order, continuous-time But-
terworth 10BASE-Ttransmitandreceivefilters,al-
lowing those products to meet 10BASE-T wave
shape, emission, and frequency content require-
ments without external filters.
High Performance Analog
2.2
The CS8952 is implemented in low power CMOS,
consuming only 135mAtypically.Threelow-pow-
er modes are provided to make the CS8952 ideal
for power sensitive applications such as CardBus.
Low Power Consumption
2.3
The CS8952’s digital interface and operating
modes can be tailored to efficiently support a wide
variety of applications. For example, the Media In-
dependent Interface (MII) supports 100BASE-TX,
100BASE-FX and 10BASE-T NIC cards, switch
ports and router ports. Additionally, the low-laten-
cy “repeater” interface mode minimizes data delay
through the CS8952, facilitating system compli-
ance with overall network delay budgets. To sup-
port 10BASE-T applications, the CS8952 provides
a10BASE-Tserial port(Seven-wire ENDECinter-
face).
Application Flexibility
2.4
Figure 1
illustrates a typical MII to CS8952 appli-
cation with twisted-pair and fiber interfaces. Refer
Typical Connection Diagram
to the Analog Design Considerations section for
detailed information on powersupply requirements
and decoupling, crystal and magnetics require-
ments, and twisted-pair and fiber transceiver con-
nections.
3. FUNCTIONAL DESCRIPTION
TheCS8952isacompletephysical-layertransceiv-
er for 100BASE-TX and 10BASE-T applications.
It provides a Physical Coding Sub-layer for com-
munication with an external MAC (Media Access
Controller). The CS8952 also includes a complete
Physical
Medium
Attachment
100BASE-TX and 10BASE-T Physical Medium
Dependent layer. Additionally, the CS8952 pro-
vides a PECL interface to an external optical mod-
ule for 100BASE-FX applications.
layer
and
a
The primary digital interface to the CS8952 is an
enhanced IEEE 802.3 Media Independent Interface
(MII). The MII supports parallel data transfer, ac-
cess to the CS8952 Control and Status registers,
and several status and control pins. The CS8952's
operating modes can be tailored to support a wide
variety of applications, including low-latency
100BASE-TX repeaters, switches and MII-based
network interface cards.
For 100BASE-TX applications, the digital data in-
terface can be either 4-bit parallel (nibbles) or 5-bit
parallel (code-groups). For 10BASE-T applica-
tions, the digital data format can be either 4-bit par-
allel (nibbles) or one-bit serial.
The CS8952 is controlled primarily by configura-
tion registers via the MII Management Interface.
Additionally, a number of the most fundamental
register bits can be set at power-up and reset time
by connecting pull-up or pull-down resistors to ex-
ternal pins.
The CS8952's MII interface is enhanced beyond
IEEE requirements by register extensions and the
addition of pins for MII_IRQ, RX_EN, and ISO-
DEF signals. The MII_IRQ pin provides an inter-
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