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參數(shù)資料
| 型號(hào)： | BT848A |
| 英文描述： | Single-Chip Video Capture for PCI |
| 中文描述： | 單芯片的PCI視頻捕捉 |
| 文件頁(yè)數(shù)： | 114/141頁(yè) |
| 文件大小： | 1149K |
| 代理商： | BT848A |
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Bt848/848A/849A
Single-Chip Video Capture for PCI
Brooktree
104
C
ONTROL
R
EGISTER
D
EFINITIONS
Vertical Scaling Register, Upper Byte
L848A_A
Vertical Scaling Register, Upper Byte
Memory Mapped Location 0x04C – Even Field (E_VSCALE_HI)
Memory Mapped Location 0x0CC – Odd Field (O_VSCALE_HI)
Upon reset it is initialized to 0x60.
Vertical Scaling Register, Lower Byte
Memory Mapped Location 0x050 – Even Field (E_VSCALE_LO)
Memory Mapped Location 0x0D0 – Odd Field (O_VSCALE_LO)
Upon reset it is initialized to 0x00.
Bits
Type
Default
Name
Description
[7]
RW
0
YCOMB
Luma Comb Enable: When enabled, the luma comb filter performs
a weighted average on 2, 3, 4, or 5 lines of luminance data. The
coefficients used for the average are fixed and no interpolation is
performed. When disabled by a logical zero, filtering and full verti-
cal interpolation is performed based upon the value programmed
into the VSCALE register.
0*
= Vertical low-pass filtering and vertical interpolation
1
= Vertical low-pass filtering only
[6]
RW
1
COMB
Chroma Comb Enable: This bit determines if the chroma comb is
included in the data path. If enabled, a full line store is used to
average adjacent lines of color information, reducing cross-color
artifacts.
0
= Chroma comb disabled
1*
= Chroma comb enabled
[5]
RW
1
INT
Interlace: This bit is programmed to indicate if the incoming video
is interlaced or non-interlaced. For example, if using the full frame
as input for vertical scaling, this bit should be programmed high. If
using a single field for vertical scaling, this bit should be pro-
grammed low.
0
= Non-interlace VS
1*
= Interlace VS
[4:0]
RW
00000
VSCALE_HI
Vertical Scaling Ratio: These five bits represent the most signifi-
cant portion of the 13-bit vertical scaling ratio register.
Bits
Type
Default
Name
Description
[7:0]
RW
0x00
VSCALE_LO
Vertical Scaling Ratio: These eight bits represent the least signifi-
cant byte of the 13-bit vertical scaling ratio register. They are con-
catenated with five bits in VSCALE_HI. The following equation
should be used to determine the value for this register:
VSCALE = ( 0x10000 – { [ ( scaling_ratio ) – 1] * 512 } ) & 0x1FFF
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