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參數(shù)資料
| 型號(hào)： | AM8530 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Serial Communications Controller |
| 中文描述： | 串行通信控制器 |
| 文件頁(yè)數(shù)： | 172/194頁(yè) |
| 文件大?。?/td> | 797K |
| 代理商： | AM8530 |
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SCC Application Notes
AMD
7–23
7.5.3
The following description addresses the problems of interfacing the 68000 and Am8530H
with interrupts. The circuit configuration is basically the same as the design without inter-
rupts.
T he 68000 and Am8530H with Interrupts
The 74LS148 and the two 74LS138s assume there are other interrupting devices which
are not compatible with the interrupt daisy chain of the Am8530H. The 74LS148 and one
of the 74LS138 can be eliminated if this is not the case.
The first 74LS138 acts as a status decoder; it is gated with AS to de-glitch the outputs.
The second 74LS138 decodes the Interrupt Acknowledge priority level, allowing a two-
dimensional priority scheme. Daisy chain can be used to resolve priority at any given pri-
ority level while the CPU resolves priority between levels.
The 74LS164 is added to generate the correct timing during an Interrupt Acknowledge
cycle. It allows 5 CPU clocks for the daisy chain to settle before it generates
RD
to put the
vector onto the bus. The daisy chain is implemented by using the IEI, IEO pins (not
shown in Figure 7–12) on the 8500 peripherals. The time allowed for the daisy chain to
settle is a function of the number of devices in the chain; thus the allowance of 5 clocks
used here is arbitrary. The 74LS164 also generates
DTACK
. A block diagram of this inter-
face is shown in Figure 7–15. Timing diagram is followed in Figure 7–13. It is more
straightforward to use the Am9519A Interrupt Controller instead of the on-chip interrupt
features. However, this approach does not allow the programmer to take advantage of
some of the Am8530H time-saving features.
S0S1S2S3S4
SWSWSWSWSWSWSWSWSWSWS6S7S0
SW
T1
T2
TW
TW
TW
TW
TW
T3
T4
AS
FC0–FC02
IACK
DTACK
RD
DATA IN
A1 - A3
READ
DATA
Figure 7–13. Am8530H to 68000 Interrupt Acknowledge Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM8530H | Serial Communications Controller |
| AM85C30-10PC | Enhanced Serial Communications Controller |
| Am85C30 | Serial Communications Controller |
| AM85C30 | Enhanced Serial Communications Controller |
| AM85C30-8PC | Enhanced Serial Communications Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM8530ADC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530ADCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530AJC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530APC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
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