參數(shù)資料
型號(hào): AK4368EG
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: DAC with built-in PLL & HP-AMP
中文描述: DAC,帶有內(nèi)置的鎖相環(huán)
文件頁數(shù): 52/60頁
文件大?。?/td> 817K
代理商: AK4368EG
ASAHI KASEI
[AK4368EG]
MS0529-E-00
2006/07
- 52 -
Addr Register Name
02H
Clock Control
D7
0
RD
0
D6
0
RD
0
D5
M/S
R/W
0
D4
D3
BF
R/W
0
D2
PS0
R/W
0
D1
PS1
R/W
0
D0
MCKAC
R/W
0
MCKO
R/W
0
R/W
Default
MCKO: Control of MCKO signal
0: Disable (Default)
1: Enable
PS1-0: MCKO Frequency
PLL mode: Table 3
EXT mode: Table 7
BF: BICK Period setting in Master Mode. In slave mode, this bit is ignored.
0: 32fs (Default)
1: 64fs
MCKAC: MCKI Input Mode Select
0: CMOS input (Default)
1: AC coupling input
M/S: Master/Slave Mode Select
0: Slave mode (Default)
1: Master mode
Addr Register Name
03H
Mode Control 0
D7
0
RD
0
D6
D5
D4
BCKP
R/W
0
D3
LRP
R/W
0
D2
DIF2
R/W
0
D1
DIF1
R/W
1
D0
DIF0
R/W
0
MONO1
R/W
0
MONO0
R/W
0
R/W
Default
DIF2-0: Audio Data Interface Format Select (Table 11)
Default: “010” (Mode 2)
LRP: LRCK Polarity Select in Slave Mode
0: Normal (Default)
1: Invert
BCKP: BICK Polarity Select in Slave Mode
0: Normal (Default)
1: Invert
MONO1-0: Mixing Select (Table 21)
Default: “00” (LR)
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