參數(shù)資料
型號： AK4368EG
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： DAC with built-in PLL & HP-AMP
中文描述： DAC，帶有內(nèi)置的鎖相環(huán)
文件頁數(shù)： 21/60頁
文件大?。?/td> 817K
代理商： AK4368EG
ASAHI KASEI
[AK4368EG]
MS0529-E-00
2006/07
- 21 -
Mode
0
1
2
4
5
6
8
9
10
3, 7,
11-15
FS3
0
0
0
0
0
0
1
1
1
FS2
0
0
0
1
1
1
0
0
0
FS1
0
0
1
0
0
1
0
0
1
FS0
0
1
0
0
1
0
0
1
0
fs
MCKI
256fs
512fs
1024fs
256fs
512fs
1024fs
256fs
512fs
1024fs
Default
8kHz
～
48kHz
8kHz
～
24kHz
8kHz
～
12kHz
8kHz
～
48kHz
8kHz
～
24kHz
8kHz
～
12kHz
8kHz
～
48kHz
8kHz
～
24kHz
8kHz
～
12kHz
Others
N/A
N/A
Table 6. Relationship between Sampling Frequency and MCKI Frequency (EXT mode)
PS1
PS0
0
0
0
1
1
0
1
1
Table 7. MCKO frequency (EXT mode, MCKO bit = “1”)
Master Mode (M/S bit = “1”)
Power Up (PMDAC bit = “1”)
MCKI pin
Refer to Table 6.
MCKO
256fs
128fs
64fs
32fs
Default
Power Down (PMDAC bit = “0”)
Input or
fixed to “L” or “H”
“L”
MCKO pin MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BICK pin
BF bit = “1”: 64fs output
BF bit = “0”: 32fs output
LRCK pin
Output
Table 8. Clock Operation in Master mode (EXT mode)
“L”
“L”
Slave Mode (M/S bit = “0”)
Power Up (PMDAC bit = “1”)
Refer to Table 6.
Power Down (PMDAC bit = “0”)
Input or
fixed to “L” or “H”
“L”
MCKI pin
MCKO pin MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BICK pin
Input
LRCK pin
Input
Fixed to “L” or “H” externally
Fixed to “L” or “H” externally
Table 9. Clock Operation in Slave mode (EXT mode)
For low sampling rates, DR and S/N degrade because of the out-of-band noise. DR and S/N are improved by using higher
frequency for MCKI. Table 10 shows DR and S/N when the DAC output is to the HP-amp.
DR, S/N (BW=20kHz, A-weight)
MCKI
fs=8kHz
256fs
56dB
512fs
75dB
1024fs
90dB
Table 10. Relationship between MCKI frequency and DR (and S/N) of HP-amp (2.4V)
fs=16kHz
75dB
90dB
N/A
相關(guān)PDF資料
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