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參數(shù)資料
| 型號： | AK4368EG |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | DAC with built-in PLL & HP-AMP |
| 中文描述： | DAC，帶有內(nèi)置的鎖相環(huán) |
| 文件頁數(shù)： | 28/60頁 |
| 文件大小： | 817K |
| 代理商： | AK4368EG |
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ASAHI KASEI
[AK4368EG]
MS0529-E-00
2006/07
- 28 -
Soft Mute
Soft mute operation is performed in the digital domain. When the SMUTE bit goes to “1”, the output signal is attenuated
by
∞
during the ATT_DATA
×
ATT transition time (Table 18) from the current ATT level. When the SMUTE bit is
returned to “0”, the mute is cancelled and the output attenuation gradually changes to the ATT level during
ATT_DATA
×
ATT transition time. If the soft mute is cancelled before attenuating to
∞
after starting the operation, the
attenuation is discontinued and is returned to the ATT level by the same cycle. The soft mute is effective for changing the
signal source without stopping the signal transmission.
SMUTE bit
Attenuation
ATS bit
(1)
ATT Level
-
∞
Analog Output
GD
(2)
GD
(3)
ATS bit
(1)
Figure 20. Soft Mute Function
Notes:
(1) ATT_DATA
×
ATT transition time (Table 18). For example, this time is 3712LRCK cycles (3712/fs) at ATS bit =
“1” and ATT_DATA = “128”.
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to
∞
after starting the operation, the attenuation is discontinued
and it is returned to the ATT level by the same cycle.
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