參數(shù)資料
型號(hào)： AK4368EG
廠(chǎng)商： Asahi Kasei Microsystems Co.,Ltd
英文描述： DAC with built-in PLL & HP-AMP
中文描述： DAC，帶有內(nèi)置的鎖相環(huán)
文件頁(yè)數(shù)： 25/60頁(yè)
文件大?。?/td> 817K
代理商： AK4368EG
ASAHI KASEI
[AK4368EG]
MS0529-E-00
2006/07
- 25 -
[2] ALC Recovery Operation
The ALC recovery operation waits for the ROTM1-0 bits (Table 12) to be set after completing the ALC limiter operation.
If the input signal does not exceed “ALC recovery waiting counter reset level” (
8.5dBFS) during the wait time, the ALC
recovery operation is executed. The volume is automatically incremented by the RATT bit (Table 14) up to the set
reference level (REF7-0 bits, Table 15), with zero crossing detection with a timeout period set by the ROTM1-0 bits
(Table 12). Then the volume is set to the same level for both channels. The ALC recovery operation is executed at a period
set by the ROTM1-0 bits. When a zero cross is detected for both channels during the wait period set by the ROTM1-0 bits,
the ALC recovery operation waits until ROTM1-0 period and the next recovery operation is executed.
During ALC recovery operation or recovery waiting, the ALC limiter operation immediately starts if either channel
exceeds the ALC limiter detection level (
6.0dBFS).
When
“ALC recovery waiting counter reset level (
8.5dBFS)
≤
Output Signal < ALC limiter detection level (
6.0dBFS)”
during the ALC recovery operation, the wait timer of the ALC recovery operation is reset. When
the “ALC recovery waiting counter reset level (
8.5dBFS) > Output Signal”,
the wait timer of the ALC recovery operation starts.
The ALC operation corresponds to impulse noise. When impulse noise is input, the ALC recovery operation executes
faster than a normal recovery operation.
RATT
GAIN STEP
0
1
1
2
Table 14. ALC Recovery GAIN Step
REF7-0
GAIN(dB)
FFH
:
Reserved
C2H
C1H
+18.0
C0H
+17.625
BFH
+17.25
:
92H
+0.375
91H
0
90H
0.375
:
73H
11.25
72H
11.625
71H
12.0
70H
:
Reserved
00H
Table 15. Reference Level for ALC Recovery operation
Default
Default
:
:
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